<?xml version="1.0"?>
<lsccip:ip version="1.0"
        xmlns:lsccip="http://www.latticesemi.com/XMLSchema/Radiant/ip"
        xmlns:xi="http://www.w3.org/2001/XInclude">

  <lsccip:general>
    <lsccip:vendor>latticesemi.com</lsccip:vendor>
    <lsccip:library>ip</lsccip:library>
    <lsccip:name>pcie_x1</lsccip:name>
    <lsccip:display_name>PCIE_X1</lsccip:display_name>
    <lsccip:version>3.0.1</lsccip:version>
    <lsccip:category>Connectivity</lsccip:category>
    <lsccip:keywords>BusType_AHB-Lite,BusType_APB</lsccip:keywords>
    <lsccip:min_radiant_version>3.1</lsccip:min_radiant_version>
    <lsccip:min_esi_version>2.2</lsccip:min_esi_version>
    <lsccip:supported_products>
      <lsccip:supported_family name="LIFCL">
        <lsccip:supported_device name="LIFCL-40"/>
      </lsccip:supported_family>
      <lsccip:supported_family name="LFD2NX">
        <lsccip:supported_device name="LFD2NX-40"/>
	<lsccip:supported_device name="LFD2NX-28"/>
	<lsccip:supported_device name="LFD2NX-35">
	<lsccip:supported_speed_grade name="*">
	    <lsccip:supported_package name="CABGA484"/>
	</lsccip:supported_speed_grade>
	</lsccip:supported_device>
	<lsccip:supported_device name="LFD2NX-65">
	<lsccip:supported_speed_grade name="*">
	    <lsccip:supported_package name="CABGA484"/>
	</lsccip:supported_speed_grade>
	</lsccip:supported_device>
      </lsccip:supported_family>
       <lsccip:supported_family name="LFMXO5">
      <lsccip:supported_device name="LFMXO5-35T"/>
      <lsccip:supported_device name="LFMXO5-65T"/>
      <lsccip:supported_device name="LFMXO5-30TDQ"/>
      </lsccip:supported_family>
    </lsccip:supported_products>
   <lsccip:supported_platforms>
      <lsccip:supported_platform name="radiant"/>
      <lsccip:supported_platform name="esi"/>
   </lsccip:supported_platforms>
  </lsccip:general>

  <lsccip:settings>
    <lsccip:setting id                  = "MGMT_TLB_LTSSM_PORT_TYPE_DS_US_N"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "1 if(DEVICE_TYPE == 'Root Port') else 0"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "MGMT_FTL_CFG_TYPE1_TYPE0_N"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "1 if(DEVICE_TYPE == 'Root Port') else 0"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "MGMT_FTL_PCIE_CAP_DEVICE_PORT_TYPE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "4 if(DEVICE_TYPE == 'Root Port') else 0"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "MGMT_FTL_PCIE_CAP_SLOT_IMPLEMENTED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "1 if(DEVICE_TYPE == 'Root Port') else 0"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "MGMT_FTL_DECODE_IGNORE_POISON"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "1 if(DEVICE_TYPE == 'Root Port') else 0"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "MGMT_FTL_DECODE_T1_RX_BYPASS_MSG_DEC"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "1 if(DEVICE_TYPE == 'Root Port') else 0"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "LINK0_FTL_ARI_CAP_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "1 if((DEVICE_TYPE == 'Root Port') or not(LINK0_NUM_FUNCTIONS == 4)) else 0"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "MGMT_TLB_LTSSM_DS_INITIAL_AUTO_RATE_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "1 if(DEVICE_TYPE == 'Root Port') else 0"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "MGMT_TLB_LTSSM_DS_INITIAL_AUTO_RATE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "1 if(DEVICE_TYPE == 'Root Port') else 0"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "LINK_WIDTH"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "PCIe Link Width"
                    default             = "X1"
                    options             = "['X1', 'X2', 'X4']"
                    editable            = "0"
                    group1              = "General"
    />

    <lsccip:setting id                  = "USR_DAT_IF_MODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Configuration Mode"
                    hidden              = "0"
                    editable            = "1"
		    options             = "[('TLP Mode',0),('DMA only Mode',1),('Bridge Mode',2),('DMA with Bridge Mode',3)]"
                    group1              = "General"
    />

    <lsccip:setting id                  = "USR_DAT_IF_TYPE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Data Interface Type"
                    hidden              = "(USR_DAT_IF_MODE == 2)"
		    options             = "['AXI_MM'] if (USR_DAT_IF_MODE == 1 or USR_DAT_IF_MODE == 3) else (['AXI_MM','AXI_LITE'] if (USR_DAT_IF_MODE == 2) else ['TLP','AXI_STREAM'])"
		    value_expr          = "'AXI_MM' if ( USR_DAT_IF_MODE == 1 or USR_DAT_IF_MODE == 2 or USR_DAT_IF_MODE == 3 ) else ('TLP')"
		    group1              = "General"
    />

    <lsccip:setting id                  = "DMA_BYPASS_IF_TYPE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Bridge Interface Type"
                    hidden              = "not ((USR_DAT_IF_MODE == 2) or (USR_DAT_IF_MODE == 3))"
		    options             = "['AXI_MM', 'AXI_LITE']"
		    default             = "AXI_LITE"
                    group1              = "General"
    />

    <lsccip:setting id                  = "DEVICE_TYPE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "PCIe Device Type"
                    default             = "PCIe Endpoint"
                    options             = "['PCIe Endpoint', 'Root Port']"
                    editable            = "0"
                    group1              = "General"
    />

    <lsccip:setting id                  = "LINK0_FTL_INITIAL_TARGET_LINK_SPEED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Target Link Speed"
                    default             = "1"
                    options             = "[('GEN1',0), ('GEN2',1)]"
                    group1              = "General"
    />

    <lsccip:setting id                  = "LINK0_NUM_FUNCTIONS"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Number of Physical Functions"
                    default             = "1"
                    options             = "[1,2,3,4]"
                    editable            = "(DEVICE_TYPE == 'PCIe Endpoint') and (not control_plane_dma)"
                    hidden              = "(DEVICE_TYPE != 'PCIe Endpoint')"
                    group1              = "General"
    />

    <lsccip:setting id                  = "SIM_REDUCE_TIMEOUT"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Simulation Reduce Timeout"
                    default             = "False"
                    group1              = "General"
    />

    <lsccip:setting id                  = "control_plane_dma"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Control Plane DMA"
                    default             = "False"
		    hidden              = "True"
		    value_expr          = "(EN_AXI_DMA or DMA_BYPASS_EN)"
                    group1              = "General"
    />

    <lsccip:setting id                  = "USE_DEFAULT_IF"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Use TLP Interface"
		    hidden              = "True"
                    default             = "False"
                    group1              = "General"
    />

    <lsccip:setting id                  = "EN_AXI_DMA"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "AXI DMA Enabled"
                    default             = "False"
                    hidden              = "True"
                    value_expr          = "(USR_DAT_IF_MODE == 1 or USR_DAT_IF_MODE == 2 or USR_DAT_IF_MODE == 3)"
                    group1              = "General"
    />

    <lsccip:setting id                  = "EN_AXI_DMA_GUI"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "AXI DMA Enabled"
                    default             = "True"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "EN_DMA_SUPPORT"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable DMA Support"
                    default             = "True"
                    bool_value_mapping  = "['Enable','Disable']"
                    value_expr          = "True if(DEVICE_TYPE == 'PCIe Endpoint' and USR_DAT_IF_TYPE == 'AHB_LITE') else False"
                    editable            = "(DEVICE_TYPE == 'PCIe Endpoint' and USR_DAT_IF_TYPE == 'AHB_LITE')"
                    hidden              = "True"
                    group1              = "General"
    />

<!--DO NOT REMOVE!! DEVICE_FAMILY, DEVICE, SUPPORTED_LFMXO5_PCIEX1, SUPPORTED_LFMXO5_PCIEX4 params mainly for ED use case-->
    <lsccip:setting  id                 = "DEVICE_FAMILY"
                     type               = "param"
                     conn_mod           = "lscc_pcie_gen3"
                     value_type         = "string"
                     title              = "Device Family"
                     hidden             = "True"
                     value_expr         = "runtime_info.device_info.architecture(1)"
                     group1             = "General"
    />

    <lsccip:setting  id                 = "DEVICE"
                     type               = "param"
                     conn_mod           = "lscc_pcie_gen3"
                     value_type         = "string"
                     title              = "Device Info"
                     hidden             = "True"
		     editable           = "0"
                     value_expr         = "runtime_info.device_info.device(1)"
                     group1             = "General"
    />

    <lsccip:setting  id                 = "SUPPORTED_LFMXO5_PCIEX1"
                     type               = "param"
                     conn_mod           = "lscc_pcie_gen3"
                     value_type         = "bool"
                     title              = "Supported LFMXO5 for PCIEx1"
                     hidden             = "True"
		     editable           = "0"
                     value_expr         = "(DEVICE == 'LFMXO5-35T' or DEVICE == 'LFMXO5-65T' or DEVICE == 'LFMXO5-30TDQ')"
                     group1             = "General"
    />

    <lsccip:setting  id                 = "SUPPORTED_LFMXO5_PCIEX4"
                     type               = "param"
                     conn_mod           = "lscc_pcie_gen3"
                     value_type         = "bool"
                     title              = "Supported LFMXO5 for PCIEx4"
                     hidden             = "True"
		     editable           = "0"
                     value_expr         = "(DEVICE == 'LFMXO5-55T' or DEVICE == 'LFMXO5-100T' or DEVICE == 'LFMXO5-55TD' or DEVICE == 'LFMXO5-55TDQ')"
                     group1             = "General"
    />
<!--DO NOT REMOVE!! DEVICE_FAMILY, DEVICE, SUPPORTED_LFMXO5_PCIEX1, SUPPORTED_LFMXO5_PCIEX4 params mainly for ED use case-->

    <lsccip:setting id                  = "USR_MST_IF_TYPE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Manager (Data) Interface Type"
                    default             = "AHB_LITE"
                    value_expr          = "'TLP' if(USR_DAT_IF_TYPE == 'TLP') else USR_DAT_IF_TYPE"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "USR_SLV_IF_TYPE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subordinate (Data) Interface Type"
                    default             = "NONE"
                    value_expr          = "'TLP' if(USR_DAT_IF_TYPE == 'TLP') else ('NONE' if (EN_DMA_SUPPORT or EN_AXI_DMA) else USR_DAT_IF_TYPE)"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "EN_MAP_CSR2SLVIF"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Merge Register and Subordinate (Data) Interface"
                    default             = "False"
                    bool_value_mapping  = "['Enable','Disable']"
                    value_expr          = "False"
                    editable            = "(USR_SLV_IF_TYPE == 'AHB_LITE') and (not (USR_DAT_IF_TYPE == 'TLP'))"
                    hidden              = "(USR_SLV_IF_TYPE != 'AHB_LITE') or (USR_DAT_IF_TYPE == 'TLP') or control_plane_dma or DMA_BYPASS_EN"
                    group1              = "General"
    />

    <lsccip:setting id                  = "USR_CFG_IF_TYPE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Register Interface Type"
                    default             = "APB"
                    options             = "[('default (LMMI)','LMMI')] if((USR_DAT_IF_TYPE == 'TLP') or (USR_DAT_IF_TYPE == 'AXI_MM') or (USR_DAT_IF_TYPE == 'AXI_LITE')) else (['NONE'] if(EN_MAP_CSR2SLVIF) else ( [('APB')] if((USR_DAT_IF_TYPE == 'AXI_STREAM') and (USR_DAT_IF_MODE == 0)) else (['AHB_LITE', 'APB'])))"
                    value_expr          = "'LMMI' if((USR_DAT_IF_TYPE == 'TLP') or (USR_DAT_IF_TYPE == 'AXI_MM') or (USR_DAT_IF_TYPE == 'AXI_LITE')) else ('NONE' if(EN_MAP_CSR2SLVIF) else 'APB')"
                    editable            = "(not (USR_DAT_IF_TYPE == 'TLP')) and ((USR_DAT_IF_TYPE != 'AHB_LITE') or (not EN_MAP_CSR2SLVIF))"
                    hidden              = "EN_MAP_CSR2SLVIF"
                    group1              = "General"
    />

    <lsccip:setting id                  = "pcie_csr_baseadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "PCIe CSR Base Address (512 KiB aligned)"
                    default             = "C5200000"
                    drc                 = "hex_value_drc(pcie_csr_baseadr,8) and ((int(pcie_csr_baseadr,16) % 524288) == 0)"
                    editable            = "not (USR_DAT_IF_TYPE == 'TLP')"
                    hidden              = "(USR_DAT_IF_TYPE == 'TLP') or control_plane_dma"
                    group1              = "General"
    />

    <lsccip:setting id                  = "PCIE_CSR_BASEADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('13\'h' + ('%x' % (int(pcie_csr_baseadr,16) // 524288))) if(hex_value_drc(pcie_csr_baseadr,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "General"
    />

    <lsccip:setting id                  = "PCIE_LL_MAIN_CTRL_0_DISABLE_CSR_RESET_PORT"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Hard IP Core CSR Reset Mode"
                    description         = "Select Hard IP Register Reset mode"
                    default             = "1"
                    options             = "[('Soft Reset Only (via register write)',1),('Enable both Soft Reset and through reset port',0)]"
                    editable            = "0"
                    group1              = "General"
    />

    <lsccip:setting id                  = "DMA_BYPASS_EN"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "DMA Bypass Mode"
                    default             = "False"
		    hidden              = "True"
		    value_expr          = "True if ((USR_DAT_IF_MODE == 2) or (USR_DAT_IF_MODE == 3)) else False"
		    group1              = "General"
    />

    <lsccip:setting id                  = "NUM_H2F_CHAN"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Number of H2F Channel"
		    default             = "1"
		    value_expr          = "0 if(USR_DAT_IF_MODE == 2) else 1"
                    options             = "[0,1]"
		    editable            = "not (USR_DAT_IF_MODE == 2)"
		    hidden              = "not control_plane_dma or (USR_DAT_IF_MODE == 2)"
		    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "NUM_F2H_CHAN"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Number of F2H Channel"
                    default             = "1"
		    value_expr          = "0 if(USR_DAT_IF_MODE == 2) else 1"
                    options             = "[0,1]"
		    editable            = "not (USR_DAT_IF_MODE == 2)"
		    hidden              = "not control_plane_dma or (USR_DAT_IF_MODE == 2)"
                    group1              = "DMA/Bridge Mode Support configurations"
		    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "DMA_AXI_WIDTH"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "DMA AXI-MM Data Width"
                    options             = "[('32 Bit',32)]"
                    hidden              = "True"
		    editable            = "0"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "DMA_AXI_ID_WIDTH"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "DMA AXI-MM ID Width"
                    default             = "3"
                    hidden              = "((USR_DAT_IF_TYPE == 'AXI_LITE') or ((USR_DAT_IF_TYPE == 'AXI_MM') and not EN_AXI_DMA_GUI)) or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and (USR_DAT_IF_MODE == 2)) or not EN_AXI_DMA"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "C0_H2F_DESC_BYP"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "H2F Descriptor Bypass"
                    default             = "0"
                    options             = "[('Yes',1),('No',0)]"
                    hidden              = "True"
                    editable            = "0"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "C0_F2H_DESC_BYP"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "F2H Descriptor Bypass"
                    default             = "0"
                    options             = "[('Yes',1),('No',0)]"
                    hidden              = "True"
                    editable            = "0"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "DMA_LEN"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Max DMA Transfer Size (per Descriptor)"
                    default             = "24"
		    editable            = "False"
		    hidden              = "True"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "NUM_OSTD_NP"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Number of outstanding MRd TLP"
                    default             = "64"
		    editable            = "False"
		    hidden              = "True"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "AXIL_BAR_MAP"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Function 0 BAR"
                    default             = "1"
                    value_range         = "[2,5] if en_bar0_64bit else [1,5]" 
                    value_expr          = "2 if en_bar0_64bit else 1"
		    hidden              = "not (EN_AXI_DMA and DMA_BYPASS_EN)"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "AXIL_BAR_64BIT_EN"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Function 0 BAR 64-bit enable"
                    default             = "False"
                    hidden              = "True"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "DMA_BAR_MAP"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Register BAR"
                    default             = "0"
                    options             = "[0]"
                    hidden              = "not (EN_AXI_DMA)"
                    editable            = "False"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "en_bar0_64bit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Register BAR 64-bit enable"
                    default             = "False"
                    editable            = "False"
                    hidden              = "not ( (EN_AXI_DMA and (DMA_BAR_MAP == 0)) or DMA_BYPASS_EN )"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "DMA_INTERRUPT"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Interrupt"
                    default             = "1"
                    options             = "[('MSI',1),('MSI-X',2)] if ((NUM_H2F_CHAN == 0) and (NUM_F2H_CHAN == 0)) else [('MSI',1)]"
                    hidden              = "not (EN_AXI_DMA or DMA_BYPASS_EN)"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "NUM_USR_INT"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Number of User Interrupt"
                    default             = "1"
		    value_range         = "(1,64) if (DMA_INTERRUPT == 2 and DMA_BYPASS_EN) else ((1,16) if (control_plane_dma) else (1,4))"
                    hidden              = "not EN_AXI_DMA"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

    <lsccip:setting id                  = "EN_AXI_DMA_ED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable DMA Example Design"
                    default             = "False"
                    hidden              = "True"
                    group1              = "DMA/Bridge Mode Support configurations"
                    group2              = "DMA/Bridge Mode Support"
    />

  <!--Optional Ports-->
    <lsccip:setting id                  = "USE_CLKREQ_SIGNAL"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable CLKREQ# Port"
                    default             = "False"
                    editable            = "1"
                    group1              = "Optional Ports"
                    group2              = "General"
    />

    <lsccip:setting id                  = "EN_LTSSM_DISABLE_PORT"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable LTSSM disable Port"
                    default             = "False"
                    editable            = "1"
                    group1              = "Optional Ports"
                    group2              = "General"
    />

    <lsccip:setting id                  = "EN_LTR_PORTS"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable PM LTR Ports"
                    default             = "False"
                    editable            = "LINK0_FTL_LTR_CAP_ENABLE"
                    group1              = "Optional Ports"
                    group2              = "General"
    />

    <lsccip:setting id                  = "EN_DPA_PORTS"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable PM DPA Ports"
                    default             = "False"
                    editable            = "LINK0_FTL_DPA_CAP_ENABLE"
                    group1              = "Optional Ports"
                    group2              = "General"
    />

    <lsccip:setting id                  = "EN_PWR_BUDGET_PORTS"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable PM PB Ports"
                    default             = "False"
                    editable            = "LINK0_FTL_PWR_BUDGET_CAP_ENABLE"
                    group1              = "Optional Ports"
                    group2              = "General"
    />

    <lsccip:setting id                  = "PCIE_LL_MAIN_CTRL_4_EN_PORT_MGMT_INTERRUPT_LEG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Legacy interrupt Ports"
                    default             = "True"
                    value_expr          = "not (LINK0_FTL_INTERRUPT_DISABLE) and (not EN_AXI_DMA)"
                    editable            = "not (LINK0_FTL_INTERRUPT_DISABLE) and (not EN_AXI_DMA)"
                    group1              = "Optional Ports"
                    group2              = "General"
    />

<!--LINK0 ASPM-->
    <lsccip:setting id                  = "LINK0_ASPM_SUPPORT"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
		    title               = "Active State Power Management (ASPM) Support"
		    options             = "[('No ASPM Support','NO_ASPM'), ('L0s Supported','L0S_SUPPORTED'), ('L1 Supported','L1_SUPPORTED'), ('L0s and L1 Supported','L0S_AND_L1_SUPPORTED')]"
                    value_type          = "string"
                    default             = "NO_ASPM"
		    editable            = "0"
                    group1              = "ASPM Capability"
                    group2              = "General"
    />

    <lsccip:setting id                  = "LINK0_EN_ASPM_L0S"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
		    title               = "ASPM L0s Enable"
                    value_type          = "int"
		    bool_value_mapping  = "[('ENABLED',1),('DISABLED',0)]"
                    default             = "0" 
		    hidden              = "(LINK0_ASPM_SUPPORT == 'NO_ASPM') or (LINK0_ASPM_SUPPORT == 'L1_SUPPORTED')"
                    group1              = "ASPM Capability"
                    group2              = "General"
    />

    <lsccip:setting id                  = "in_LINK0_ENTRY_TIME_ASPM_L0S"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
		    title               = "ASPM L0s Entry Time (16'h)"
                    value_type          = "string"
                    default             = "0000"
                    drc                 = "hex_value_drc(in_LINK0_ENTRY_TIME_ASPM_L0S,4)"
		    hidden              = "(LINK0_ASPM_SUPPORT == 'NO_ASPM') or (LINK0_ASPM_SUPPORT == 'L1_SUPPORTED')"
		    editable            = "LINK0_EN_ASPM_L0S"
                    group1              = "ASPM Capability"
                    group2              = "General"
    />

    <lsccip:setting id                  = "LINK0_ENTRY_TIME_ASPM_L0S"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
		    title               = "ASPM L0s Entry Time"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_LINK0_ENTRY_TIME_ASPM_L0S)"
                    output_formatter    = "nostr" 
		    hidden              = "True"
		    editable            = "LINK0_EN_ASPM_L0S"
                    group1              = "ASPM Capability"
                    group2              = "General"
    />

    <lsccip:setting id                  = "LINK0_EN_ASPM_L1"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
		    title               = "ASPM L1 Enable"
                    value_type          = "int"
		    bool_value_mapping  = "[('ENABLED',1),('DISABLED',0)]"
                    default             = "0" 
		    hidden              = "(LINK0_ASPM_SUPPORT == 'NO_ASPM') or (LINK0_ASPM_SUPPORT == 'L0S_SUPPORTED')"
                    group1              = "ASPM Capability"
                    group2              = "General"
    />

    <lsccip:setting id                  = "in_LINK0_ENTRY_TIME_ASPM_L1"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
		    title               = "ASPM L1 Entry Time"
                    value_type          = "string"
                    default             = "0000"
                    drc                 = "hex_value_drc(in_LINK0_ENTRY_TIME_ASPM_L1,4)"
		    hidden              = "(LINK0_ASPM_SUPPORT == 'NO_ASPM') or (LINK0_ASPM_SUPPORT == 'L0S_SUPPORTED')"
		    editable            = "LINK0_EN_ASPM_L1"
                    group1              = "ASPM Capability"
                    group2              = "General"
    />

    <lsccip:setting id                  = "LINK0_ENTRY_TIME_ASPM_L1"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
		    title               = "ASPM L1 Entry Time"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_LINK0_ENTRY_TIME_ASPM_L1)"
                    output_formatter    = "nostr"
                    default             = "0000"
		    hidden              = "True"
		    editable            = "LINK0_EN_ASPM_L1"
                    group1              = "ASPM Capability"
                    group2              = "General"
    />

    <lsccip:setting id                  = "desc_queue_baseadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Descriptor Queue Base Address (4 KiB aligned)"
                    default             = "DE5C1000"
                    drc                 = "hex_value_drc(desc_queue_baseadr,8) and ((int(desc_queue_baseadr,16) % 4096) == 0)"
                    editable            = "EN_DMA_SUPPORT"
                    hidden              = "not EN_DMA_SUPPORT or control_plane_dma"
                    group1              = "DMA Support"
    />

    <lsccip:setting id                  = "DESC_QUEUE_BASEADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('20\'h' + ('%x' % (int(desc_queue_baseadr,16) // 4096))) if(hex_value_drc(desc_queue_baseadr,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "DMA Support"
    />

    <lsccip:setting id                  = "DESC_QUEUE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Descriptor Queue Depth"
                    default             = "32"
                    options             = "[4,8,16,32,64,128,256]"
                    editable            = "EN_DMA_SUPPORT"
                    hidden              = "not EN_DMA_SUPPORT or control_plane_dma"
                    group1              = "DMA Support"
    />

    <lsccip:setting id                  = "stat_queue_baseadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Status Queue Base Address (4 KiB aligned)"
                    default             = "57A72000"
                    drc                 = "hex_value_drc(stat_queue_baseadr,8) and ((int(stat_queue_baseadr,16) % 4096) == 0)"
                    editable            = "EN_DMA_SUPPORT"
                    hidden              = "not EN_DMA_SUPPORT or control_plane_dma"
                    group1              = "DMA Support"
    />

    <lsccip:setting id                  = "STAT_QUEUE_BASEADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('20\'h' + ('%x' % (int(stat_queue_baseadr,16) // 4096))) if(hex_value_drc(stat_queue_baseadr,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "DMA Support"
    />

    <lsccip:setting id                  = "STAT_QUEUE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Status Queue Depth"
                    default             = "32"
                    options             = "[4,8,16,32,64,128,256]"
                    editable            = "EN_DMA_SUPPORT"
                    hidden              = "not EN_DMA_SUPPORT or control_plane_dma"
                    group1              = "DMA Support"
    />

    <lsccip:setting id                  = "pcie_loc_addr_posted"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Posted TLP Base Address (4 KiB aligned)"
                    default             = "FFFF0000"
                    output_formatter    = "nostr"
                    drc                 = "hex_value_drc(pcie_loc_addr_posted,8) and ((int(pcie_loc_addr_posted,16) % 4096) == 0)"
                    editable            = "(USR_SLV_IF_TYPE == 'AHB_LITE')"
                    hidden              = "(USR_SLV_IF_TYPE != 'AHB_LITE') or control_plane_dma"
                    group1              = "Rx TLP Destination Base Address"
    />

    <lsccip:setting id                  = "PCIE_LOC_ADDR_POSTED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h' + pcie_loc_addr_posted"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Rx TLP Destination Base Address"
    />

    <lsccip:setting id                  = "pcie_loc_addr_nonposted"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Non-Posted TLP Base Address (4 KiB aligned)"
                    default             = "FFFF1000"
                    output_formatter    = "nostr"
                    drc                 = "hex_value_drc(pcie_loc_addr_nonposted,8) and ((int(pcie_loc_addr_nonposted,16) % 4096) == 0)"
                    editable            = "(USR_SLV_IF_TYPE == 'AHB_LITE')"
                    hidden              = "(USR_SLV_IF_TYPE != 'AHB_LITE') or control_plane_dma"
                    group1              = "Rx TLP Destination Base Address"
    />

    <lsccip:setting id                  = "PCIE_LOC_ADDR_NONPOSTED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h' + pcie_loc_addr_nonposted"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Rx TLP Destination Base Address"
    />

    <lsccip:setting id                  = "pcie_loc_addr_completion"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Completion TLP Base Address (4 KiB aligned)"
                    default             = "FFFF2000"
                    output_formatter    = "nostr"
                    drc                 = "hex_value_drc(pcie_loc_addr_completion,8) and ((int(pcie_loc_addr_completion,16) % 4096) == 0)"
                    editable            = "(USR_SLV_IF_TYPE == 'AHB_LITE')"
                    hidden              = "(USR_SLV_IF_TYPE != 'AHB_LITE') or control_plane_dma"
                    group1              = "Rx TLP Destination Base Address"
    />

    <lsccip:setting id                  = "PCIE_LOC_ADDR_COMPLETION"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h' + pcie_loc_addr_completion"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Rx TLP Destination Base Address"
    />

    <lsccip:setting id                  = "MGMT_PTL_RX_CTRL_FC_UPDATE_TIMER_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable FC Update Timer"
                    default             = "False"
                    editable            = "1"
                    group1              = "Flow Control Update"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_RX_CTRL_FC_UPDATE_TIMER_DIV"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "FC Update Timer Divider"
                    options             = "[('Use PCIe Spec recommended values',0), ('PCIe Spec recommended values divide by 2', 2), ('PCIe Spec recommended values divide by 4',4), ('PCIe Spec recommended values divide by 8',8)]"
                    default             = "0"
                    value_expr          = "0"
                    editable            = "not MGMT_PTL_RX_CTRL_FC_UPDATE_TIMER_DISABLE"
                    hidden              = "MGMT_PTL_RX_CTRL_FC_UPDATE_TIMER_DISABLE"
                    group1              = "Flow Control Update"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_RX_CTRL_ADV_CH_CD_SEL"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Completion Credit (CH,CD) Advertisement"
                    options             = "[('Advertise [Infinite for Endpoint], [Actual values for Root Port]',0), ('Advertise actual CH,CD credits', 1), ('Advertise Infinite CH,CD credits',2)]"
                    default             = "0"
                    editable            = "1"
                    group1              = "Flow Control Update"
                    group2              = "Flow Control"
    />

    <!--Function 0-->
    <lsccip:setting id                  = "FUNCTION_0_DISABLE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable Function 0"
                    default             = "False"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_ID1_DEVICE_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Device ID (16'h)"
                    default             = "9C1D"
                    drc                 = "hex_value_drc(in_FTL_ID1_DEVICE_ID,4)"
                    editable            = "1"
		    hidden              = "control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_ID1_DEVICE_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_ID1_DEVICE_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_ID1_DEVICE_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_AXIDMA_LINK0_FTL_ID1_DEVICE_ID,16),'#018b') if (control_plane_dma) else format(int(in_FTL_ID1_DEVICE_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_ID1_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Vendor ID (16'h)"
                    default             = "19AA"
                    drc                 = "hex_value_drc(in_FTL_ID1_VENDOR_ID,4)"
                    editable            = "1"
		    hidden              = "control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_ID1_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_ID1_VENDOR_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_ID1_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_AXIDMA_LINK0_FTL_ID1_VENDOR_ID,16),'#018b') if (control_plane_dma) else format(int(in_FTL_ID1_VENDOR_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_ID2_SUBSYSTEM_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem ID (16'h)"
                    default             = "E004"
                    drc                 = "hex_value_drc(in_FTL_ID2_SUBSYSTEM_ID,4)"
                    editable            = "1"
		    hidden              = "control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_ID2_SUBSYSTEM_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_ID2_SUBSYSTEM_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_ID2_SUBSYSTEM_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_ID,16),'#018b') if (control_plane_dma) else format(int(in_FTL_ID2_SUBSYSTEM_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem Vendor ID (16'h)"
                    default             = "19AA"
                    drc                 = "hex_value_drc(in_FTL_ID2_SUBSYSTEM_VENDOR_ID,4)"
                    editable            = "1"
		    hidden              = "control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_ID2_SUBSYSTEM_VENDOR_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_VENDOR_ID,16),'#018b') if (control_plane_dma) else format(int(in_FTL_ID2_SUBSYSTEM_VENDOR_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_ID3_CLASS_CODE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Class Code (24'h)"
                    default             = "118000"
                    drc                 = "hex_value_drc(in_FTL_ID3_CLASS_CODE,6)"
                    editable            = "1"
		    hidden              = "control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_ID3_CLASS_CODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'24\'h'+ ('%s' % in_FTL_ID3_CLASS_CODE)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_ID3_CLASS_CODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_AXIDMA_LINK0_FTL_ID3_CLASS_CODE,16),'#026b') if (control_plane_dma) else format(int(in_FTL_ID3_CLASS_CODE,16),'#026b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_ID3_REVISION_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Revision ID (8'h)"
                    default             = "04"
                    drc                 = "hex_value_drc(in_FTL_ID3_REVISION_ID,2)"
                    editable            = "1"
		    hidden              = "control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_ID3_REVISION_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'8\'h'+ ('%s' % in_FTL_ID3_REVISION_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_ID3_REVISION_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_AXIDMA_LINK0_FTL_ID3_REVISION_ID,16),'#010b') if (control_plane_dma) else format(int(in_FTL_ID3_REVISION_ID,16),'#010b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_DS_PORT_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Root Port ID (16'h)"
                    description         = "This 16 bit field is used to define the ID used for PCIe Requester ID
                                           and Completer ID when the core is operating as a Root Port."
                    default             = "0000"
                    drc                 = "hex_value_drc(in_FTL_DS_PORT_ID,4)"
                    editable            = "1 if(DEVICE_TYPE == 'Root Port') else 0"
                    hidden              = "(DEVICE_TYPE != 'Root Port')"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DS_PORT_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_DS_PORT_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_RBAR_CAP_ENABLE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Resizable BAR Capability"
                    default             = "False"
                    editable            = "1"
		    hidden              = "control_plane_dma"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <!--AXIDMA  Link0 Function 0-->
    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_ID1_DEVICE_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Device ID (16'h)"
                    default             = "9C1D"
                    drc                 = "hex_value_drc(in_AXIDMA_LINK0_FTL_ID1_DEVICE_ID,4)"
                    editable            = "1"
                    hidden              = "not control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_ID1_DEVICE_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_AXIDMA_LINK0_FTL_ID1_DEVICE_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_ID1_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Vendor ID (16'h)"
                    default             = "1204"
                    drc                 = "hex_value_drc(in_AXIDMA_LINK0_FTL_ID1_VENDOR_ID,4)"
                    editable            = "1"
                    hidden              = "not control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_ID1_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_AXIDMA_LINK0_FTL_ID1_VENDOR_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem ID (16'h)"
                    default             = "E004"
                    drc                 = "hex_value_drc(in_AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_ID,4)"
                    editable            = "1"
                    hidden              = "not control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem Vendor ID (16'h)"
                    default             = "19AA"
                    drc                 = "hex_value_drc(in_AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_VENDOR_ID,4)"
                    editable            = "1"
                    hidden              = "not control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_AXIDMA_LINK0_FTL_ID2_SUBSYSTEM_VENDOR_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_ID3_CLASS_CODE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Class Code (24'h)"
                    default             = "88000"
                    drc                 = "hex_value_drc(in_AXIDMA_LINK0_FTL_ID3_CLASS_CODE,6)"
                    editable            = "1"
                    hidden              = "not control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_ID3_CLASS_CODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'24\'h'+ ('%s' % in_AXIDMA_LINK0_FTL_ID3_CLASS_CODE)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_ID3_REVISION_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Revision ID (8'h)"
                    default             = "10"
                    drc                 = "hex_value_drc(in_AXIDMA_LINK0_FTL_ID3_REVISION_ID,2)"
                    editable            = "1"
                    hidden              = "not control_plane_dma"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_ID3_REVISION_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'8\'h'+ ('%s' % in_AXIDMA_LINK0_FTL_ID3_REVISION_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_RBAR_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Resizable BAR Capability"
                    bool_value_mapping  = "('ENABLED','DISABLED')"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not control_plane_dma"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar0_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Enable"
		    default             = "False"
                    editable            = "0"
		    value_expr          = "control_plane_dma"
                    hidden              = "not control_plane_dma"
		    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar0_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Resizable"
                    default             = "False"
		    editable            = "AXIDMA_LINK0_FTL_RBAR_CAP_ENABLE and axidma_link0_f0_bar0_enable"
                    hidden              = "not control_plane_dma"
		    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar0_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "0"
                    hidden              = "not control_plane_dma"
		    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar0_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : 64 bit address"
                    default             = "False"
                    value_expr          = "en_bar0_64bit"
                    editable            = "0"
                    hidden              = "not (EN_AXI_DMA and (DMA_BAR_MAP == 0))"
		    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar0_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Prefetchable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not control_plane_dma"
		    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_RBAR_CFG0_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 0 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_AXIDMA_LINK0_FTL_RBAR_CFG0_SUPPORTED_SIZES,5,axidma_link0_f0_bar0_64b)"
                    editable            = "0"
                    hidden              = "not control_plane_dma"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar0_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (unit)"
                    default             = "0"
                    options             = "gen_bar_unit(axidma_link0_f0_bar0_type,axidma_link0_f0_bar0_64b,in_AXIDMA_LINK0_FTL_RBAR_CFG0_SUPPORTED_SIZES)"
                    value_expr          = "0 if(axidma_link0_f0_bar0_type) else (3 if(axidma_link0_f0_bar0_64b) else 1)"
                    editable            = "0"
                    hidden              = "not control_plane_dma"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar0_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(axidma_link0_f0_bar0_type,axidma_link0_f0_bar0_64b,axidma_link0_f0_bar0_unit,in_AXIDMA_LINK0_FTL_RBAR_CFG0_SUPPORTED_SIZES)"
                    editable            = "0"
                    hidden              = "not control_plane_dma"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_BAR0_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ ('%x' % ((calc_bar_size(axidma_link0_f0_bar0_enable,axidma_link0_f0_bar0_pref,axidma_link0_f0_bar0_64b, axidma_link0_f0_bar0_unit,axidma_link0_f0_bar0_size,0,axidma_link0_f0_bar0_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 0"
                    editable            = "0"
                    hidden              = "not control_plane_dma"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0bar0_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 0"
                    editable            = "0"
                    hidden              = "not control_plane_dma"
                    default             = "0"
                    drc                 = "loc_bar_drc(axidma_link0_f0bar0_to_locadr,axidma_link0_f0_bar0_unit,axidma_link0_f0_bar0_size,axidma_link0_f0_bar0_64b,axidma_link0_f0_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_F0BAR0_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ axidma_link0_f0bar0_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar1_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Enable"
		    value_expr          = "0 if (not DMA_BYPASS_EN) else (1 if(AXIL_BAR_MAP == 1) else 0)"
                    default             = "False"
                    editable            = "False"
                    hidden              = "not ((EN_AXI_DMA and en_bar0_64bit) or (AXIL_BAR_MAP == 1 and DMA_BYPASS_EN))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar1_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Resizable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 1 or en_bar0_64bit))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar1_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "0"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 1 or en_bar0_64bit))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar1_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : 64 bit address"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 1 or en_bar0_64bit))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar1_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Prefetchable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 1 or en_bar0_64bit))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_RBAR_CFG1_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 1 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_AXIDMA_LINK0_FTL_RBAR_CFG1_SUPPORTED_SIZES,5,axidma_link0_f0_bar1_64b)"
                    editable            = "0"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 1 or en_bar0_64bit))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar1_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(axidma_link0_f0_bar1_type) else (3 if(axidma_link0_f0_bar1_64b) else 1)"
                    options             = "gen_bar_unit(axidma_link0_f0_bar1_type,axidma_link0_f0_bar1_64b,in_AXIDMA_LINK0_FTL_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "DMA_BYPASS_EN and (axidma_link0_f0_bar1_enable and (not axidma_link0_f0_bar1_type))"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 1 or en_bar0_64bit))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar1_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(axidma_link0_f0_bar1_type,axidma_link0_f0_bar1_64b,axidma_link0_f0_bar1_unit,in_AXIDMA_LINK0_FTL_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "DMA_BYPASS_EN and axidma_link0_f0_bar1_enable"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 1 or en_bar0_64bit))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_BAR1_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar0_enable,axidma_link0_f0_bar0_pref,axidma_link0_f0_bar0_64b,axidma_link0_f0_bar0_unit,axidma_link0_f0_bar0_size,1)))) if(axidma_link0_f0_bar0_enable and axidma_link0_f0_bar0_64b) else ('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar1_enable,axidma_link0_f0_bar1_pref,axidma_link0_f0_bar1_64b, axidma_link0_f0_bar1_unit,axidma_link0_f0_bar1_size,0,axidma_link0_f0_bar1_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 1"
                    editable            = "0"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 1 or en_bar0_64bit))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar2_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Enable"
		    value_expr          = "False if (not DMA_BYPASS_EN) else (True if (AXIL_BAR_MAP == 2) else False)"
                    default             = "False"
                    editable            = "False"
                    hidden              = "(not (DMA_BYPASS_EN and (AXIL_BAR_MAP == 2)))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar2_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Resizable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 2)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar2_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 2)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar2_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : 64 bit address"
                    default             = "False"
                    editable            = "0"
                    value_expr          = "AXIL_BAR_64BIT_EN and (AXIL_BAR_MAP == 2)"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 2)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar2_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Prefetchable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 2)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_RBAR_CFG2_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 2 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_AXIDMA_LINK0_FTL_RBAR_CFG2_SUPPORTED_SIZES,5,axidma_link0_f0_bar2_64b)"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 2)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar2_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(axidma_link0_f0_bar2_type) else (1 if(axidma_link0_f0_bar2_64b) else 1)"
                    options             = "gen_bar_unit(axidma_link0_f0_bar2_type,axidma_link0_f0_bar2_64b,in_AXIDMA_LINK0_FTL_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "axidma_link0_f0_bar2_enable and (not axidma_link0_f0_bar2_type)"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 2)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar2_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(axidma_link0_f0_bar2_type,axidma_link0_f0_bar2_64b,axidma_link0_f0_bar2_unit,in_AXIDMA_LINK0_FTL_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "axidma_link0_f0_bar2_enable"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 2)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_BAR2_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar1_enable,axidma_link0_f0_bar1_pref,axidma_link0_f0_bar1_64b,axidma_link0_f0_bar1_unit,axidma_link0_f0_bar1_size,1)))) if(axidma_link0_f0_bar1_enable and axidma_link0_f0_bar1_64b) else ('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar2_enable,axidma_link0_f0_bar2_pref,axidma_link0_f0_bar2_64b, axidma_link0_f0_bar2_unit,axidma_link0_f0_bar2_size,0,axidma_link0_f0_bar2_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 2"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 2)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar3_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Enable"
		    value_expr          = "False if (not DMA_BYPASS_EN) else (True if (AXIL_BAR_MAP == 3) else False)"
                    editable            = "False"
                    hidden              = "not (EN_AXI_DMA and ((AXIL_BAR_MAP == 3) or axidma_link0_f0_bar2_64b)) or (AXIL_BAR_MAP == 4) or (AXIL_BAR_MAP == 5) or (AXIL_BAR_MAP == 1) or not DMA_BYPASS_EN"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar3_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Resizable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 3)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar3_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 3)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar3_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : 64 bit address"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 3)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar3_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Prefetchable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 3)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_RBAR_CFG3_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 3 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_AXIDMA_LINK0_FTL_RBAR_CFG3_SUPPORTED_SIZES,5,axidma_link0_f0_bar3_64b)"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 3)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar3_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(axidma_link0_f0_bar3_type) else (3 if(axidma_link0_f0_bar3_64b) else 1)"
                    options             = "gen_bar_unit(axidma_link0_f0_bar3_type,axidma_link0_f0_bar3_64b,in_AXIDMA_LINK0_FTL_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "axidma_link0_f0_bar3_enable and (not axidma_link0_f0_bar3_type)"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 3)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar3_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(axidma_link0_f0_bar3_type,axidma_link0_f0_bar3_64b,axidma_link0_f0_bar3_unit,in_AXIDMA_LINK0_FTL_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "axidma_link0_f0_bar3_enable"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 3)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_BAR3_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar2_enable,axidma_link0_f0_bar2_pref,axidma_link0_f0_bar2_64b, axidma_link0_f0_bar2_unit,axidma_link0_f0_bar2_size,1)))) if(axidma_link0_f0_bar2_enable and axidma_link0_f0_bar2_64b) else ('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar3_enable,axidma_link0_f0_bar3_pref,axidma_link0_f0_bar3_64b, axidma_link0_f0_bar3_unit,axidma_link0_f0_bar3_size,0,axidma_link0_f0_bar3_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 3"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 3)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar4_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Enable"
		    value_expr          = "False if (not DMA_BYPASS_EN) else (True if (AXIL_BAR_MAP == 4) else False)"
                    editable            = "False"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 4)) or not DMA_BYPASS_EN"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar4_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Resizable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 4)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar4_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 4)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar4_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : 64 bit address"
                    default             = "False"
                    editable            = "0"
                    value_expr          = "AXIL_BAR_64BIT_EN and (AXIL_BAR_MAP == 4)"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 4)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar4_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Prefetchable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 4)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_RBAR_CFG4_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 4 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_AXIDMA_LINK0_FTL_RBAR_CFG4_SUPPORTED_SIZES,5,axidma_link0_f0_bar4_64b)"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 4)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar4_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(axidma_link0_f0_bar4_type) else (1 if(axidma_link0_f0_bar4_64b) else 1)"
                    options             = "gen_bar_unit(axidma_link0_f0_bar4_type,axidma_link0_f0_bar4_64b,in_AXIDMA_LINK0_FTL_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "axidma_link0_f0_bar4_enable and (not axidma_link0_f0_bar4_type)"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 4)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar4_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(axidma_link0_f0_bar4_type,axidma_link0_f0_bar4_64b,axidma_link0_f0_bar4_unit,in_AXIDMA_LINK0_FTL_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "axidma_link0_f0_bar4_enable"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 4)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_BAR4_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar3_enable,axidma_link0_f0_bar3_pref,axidma_link0_f0_bar3_64b, axidma_link0_f0_bar3_unit,axidma_link0_f0_bar3_size,1)))) if(axidma_link0_f0_bar3_enable and axidma_link0_f0_bar3_64b) else ('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar4_enable,axidma_link0_f0_bar4_pref,axidma_link0_f0_bar4_64b, axidma_link0_f0_bar4_unit,axidma_link0_f0_bar4_size,0,axidma_link0_f0_bar4_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 4"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 4)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar5_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Enable"
		    value_expr          = "False if (not DMA_BYPASS_EN) else (True if (AXIL_BAR_MAP == 5) else False)"
                    editable            = "False"
                    hidden              = "not (EN_AXI_DMA and (AXIL_BAR_MAP == 5 or axidma_link0_f0_bar4_64b)) or (AXIL_BAR_MAP == 2) or (AXIL_BAR_MAP == 3) or (AXIL_BAR_MAP == 1) or not DMA_BYPASS_EN"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar5_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Resizable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 5)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar5_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 5)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar5_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : 64 bit address"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 5)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar5_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Prefetchable"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 5)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_AXIDMA_LINK0_FTL_RBAR_CFG5_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 5 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_AXIDMA_LINK0_FTL_RBAR_CFG5_SUPPORTED_SIZES,5,axidma_link0_f0_bar5_64b)"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 5)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar5_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(axidma_link0_f0_bar5_type) else (3 if(axidma_link0_f0_bar5_64b) else 1)"
                    options             = "gen_bar_unit(axidma_link0_f0_bar5_type,axidma_link0_f0_bar5_64b,in_AXIDMA_LINK0_FTL_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "axidma_link0_f0_bar5_enable and (not axidma_link0_f0_bar5_type)"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 5)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "axidma_link0_f0_bar5_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(axidma_link0_f0_bar5_type,axidma_link0_f0_bar5_64b,axidma_link0_f0_bar5_unit,in_AXIDMA_LINK0_FTL_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "axidma_link0_f0_bar5_enable"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 5)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "AXIDMA_LINK0_FTL_BAR5_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar4_enable,axidma_link0_f0_bar4_pref,axidma_link0_f0_bar4_64b,axidma_link0_f0_bar4_unit,axidma_link0_f0_bar4_size,1)))) if(axidma_link0_f0_bar4_enable and axidma_link0_f0_bar4_64b) else ('32\'h'+ ('%x' % (calc_bar_size(axidma_link0_f0_bar5_enable,axidma_link0_f0_bar5_pref,axidma_link0_f0_bar5_64b,axidma_link0_f0_bar5_unit,axidma_link0_f0_bar5_size,0,axidma_link0_f0_bar5_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 5"
                    editable            = "0"
                    hidden              = "not (DMA_BYPASS_EN and AXIL_BAR_MAP == 5)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar0_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Enable"
                    default             = "True"
                    editable            = "1"
		    value_expr          = "not control_plane_dma"
		    hidden              = "control_plane_dma"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar0_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Resizable"
                    default             = "False"
                    editable            = "LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar0_enable"
                    hidden              = "not (LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar0_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f0_bar0_enable and not link0_f0_bar0_resize_en"
                    hidden              = "not link0_f0_bar0_enable or link0_f0_bar0_resize_en"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar0_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f0_bar0_enable and (not link0_f0_bar0_type)"
                    hidden              = "not (link0_f0_bar0_enable and (not link0_f0_bar0_type))"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar0_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f0_bar0_enable and (not link0_f0_bar0_type)"
                    hidden              = "not (link0_f0_bar0_enable and (not link0_f0_bar0_type))"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_RBAR_CFG0_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 0 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_RBAR_CFG0_SUPPORTED_SIZES,5,link0_f0_bar0_64b)"
                    editable            = "link0_f0_bar0_resize_en"
                    hidden              = "not link0_f0_bar0_resize_en"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar0_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (unit)"
                    default             = "0"
                    options             = "gen_bar_unit(link0_f0_bar0_type,link0_f0_bar0_64b,in_FTL_RBAR_CFG0_SUPPORTED_SIZES)"
                    value_expr          = "0 if(link0_f0_bar0_type) else (3 if(link0_f0_bar0_64b) else 1)"
                    editable            = "link0_f0_bar0_enable and (not link0_f0_bar0_type)"
                    hidden              = "not link0_f0_bar0_enable"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar0_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f0_bar0_type,link0_f0_bar0_64b,link0_f0_bar0_unit,in_FTL_RBAR_CFG0_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar0_enable"
                    hidden              = "not link0_f0_bar0_enable"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_BAR0_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ ('%08x' % ((calc_bar_size(link0_f0_bar0_enable,link0_f0_bar0_pref,link0_f0_bar0_64b,link0_f0_bar0_unit,link0_f0_bar0_size,0,link0_f0_bar0_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 0"
                    editable            = "0"
                    hidden              = "not (link0_f0_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_BAR0_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(AXIDMA_LINK0_FTL_BAR0_CFG[4:],16),'#034b') if (control_plane_dma) else (format(int(LINK0_FTL_BAR0_CFG[4:],16),'#034b'))"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "f0bar0_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 0"
                    editable            = "EN_DMA_SUPPORT and link0_f0_bar0_enable and (not link0_f0_bar0_type)"
                    hidden              = "not (EN_DMA_SUPPORT and link0_f0_bar0_enable and (not link0_f0_bar0_type))"
                    default             = "0"
                    drc                 = "loc_bar_drc(f0bar0_to_locadr,link0_f0_bar0_unit,link0_f0_bar0_size,link0_f0_bar0_64b,link0_f0_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "F0BAR0_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ f0bar0_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 0"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar1_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Enable"
                    default             = "False"
                    editable            = "not (link0_f0_bar0_enable and link0_f0_bar0_64b)"
                    hidden              = "(link0_f0_bar0_enable and link0_f0_bar0_64b) or control_plane_dma"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar1_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Resizable"
                    default             = "False"
                    editable            = "LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar1_enable"
                    hidden              = "not (LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar1_enable)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar1_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f0_bar1_enable and not link0_f0_bar1_resize_en"
                    hidden              = "not link0_f0_bar1_enable or link0_f0_bar1_resize_en"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar1_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f0_bar1_enable and (not link0_f0_bar1_type)"
                    hidden              = "not (link0_f0_bar1_enable and (not link0_f0_bar1_type))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar1_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f0_bar1_enable and (not link0_f0_bar1_type)"
                    hidden              = "not (link0_f0_bar1_enable and (not link0_f0_bar1_type))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_RBAR_CFG1_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 1 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_RBAR_CFG1_SUPPORTED_SIZES,5,link0_f0_bar1_64b)"
                    editable            = "link0_f0_bar1_resize_en"
                    hidden              = "not link0_f0_bar1_resize_en"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar1_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f0_bar1_type) else (3 if(link0_f0_bar1_64b) else 1)"
                    options             = "gen_bar_unit(link0_f0_bar1_type,link0_f0_bar1_64b,in_FTL_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar1_enable and (not link0_f0_bar1_type)"
                    hidden              = "not link0_f0_bar1_enable"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar1_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f0_bar1_type,link0_f0_bar1_64b,link0_f0_bar1_unit,in_FTL_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar1_enable"
                    hidden              = "not link0_f0_bar1_enable"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_BAR1_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar0_enable,link0_f0_bar0_pref,link0_f0_bar0_64b,link0_f0_bar0_unit,link0_f0_bar0_size,1)))) if(link0_f0_bar0_enable and link0_f0_bar0_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar1_enable,link0_f0_bar1_pref,link0_f0_bar1_64b,link0_f0_bar1_unit,link0_f0_bar1_size,0,link0_f0_bar1_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 1"
                    editable            = "0"
                    hidden              = "not (link0_f0_bar1_enable or (link0_f0_bar0_enable and link0_f0_bar0_64b))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_BAR1_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(AXIDMA_LINK0_FTL_BAR1_CFG[4:],16),'#034b') if (control_plane_dma) else (format(int(LINK0_FTL_BAR1_CFG[4:],16),'#034b'))"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "f0bar1_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 1"
                    editable            = "EN_DMA_SUPPORT and ((link0_f0_bar1_enable and (not link0_f0_bar1_type)) or (link0_f0_bar0_enable and link0_f0_bar0_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f0_bar1_enable and (not link0_f0_bar1_type)) or (link0_f0_bar0_enable and link0_f0_bar0_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(f0bar1_to_locadr,link0_f0_bar0_unit,link0_f0_bar0_size,link0_f0_bar0_64b,link0_f0_bar0_enable,1) if(link0_f0_bar0_enable and link0_f0_bar0_64b) else loc_bar_drc(f0bar1_to_locadr,link0_f0_bar1_unit,link0_f0_bar1_size,link0_f0_bar1_64b,link0_f0_bar1_enable)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "F0BAR1_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ f0bar1_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 1"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar2_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Enable"
                    default             = "False"
                    editable            = "0 if(DEVICE_TYPE == 'Root Port') else (not (link0_f0_bar1_enable and link0_f0_bar1_64b))"
                    hidden              = "True if((DEVICE_TYPE == 'Root Port') or control_plane_dma) else ((link0_f0_bar1_enable and link0_f0_bar1_64b))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar2_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Resizable"
                    default             = "False"
                    editable            = "LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar2_enable"
                    hidden              = "not (LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar2_enable)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar2_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f0_bar2_enable and not link0_f0_bar2_resize_en"
                    hidden              = "not link0_f0_bar2_enable or link0_f0_bar2_resize_en"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar2_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f0_bar2_enable and (not link0_f0_bar2_type)"
                    hidden              = "not (link0_f0_bar2_enable and (not link0_f0_bar2_type))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar2_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f0_bar2_enable and (not link0_f0_bar2_type)"
                    hidden              = "not (link0_f0_bar2_enable and (not link0_f0_bar2_type))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_RBAR_CFG2_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 2 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_RBAR_CFG2_SUPPORTED_SIZES,5,link0_f0_bar2_64b)"
                    editable            = "link0_f0_bar2_resize_en"
                    hidden              = "not link0_f0_bar2_resize_en"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar2_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f0_bar2_type) else (3 if(link0_f0_bar2_64b) else 1)"
                    options             = "gen_bar_unit(link0_f0_bar2_type,link0_f0_bar2_64b,in_FTL_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar2_enable and (not link0_f0_bar2_type)"
                    hidden              = "not link0_f0_bar2_enable"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar2_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f0_bar2_type,link0_f0_bar2_64b,link0_f0_bar2_unit,in_FTL_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar2_enable"
                    hidden              = "not link0_f0_bar2_enable"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_BAR2_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar1_enable,link0_f0_bar1_pref,link0_f0_bar1_64b,link0_f0_bar1_unit,link0_f0_bar1_size,1)))) if(link0_f0_bar1_enable and link0_f0_bar1_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar2_enable,link0_f0_bar2_pref,link0_f0_bar2_64b,link0_f0_bar2_unit,link0_f0_bar2_size,0,link0_f0_bar2_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 2"
                    editable            = "0"
                    hidden              = "not (link0_f0_bar2_enable or (link0_f0_bar1_enable and link0_f0_bar1_64b))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_BAR2_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(AXIDMA_LINK0_FTL_BAR2_CFG[4:],16),'#034b') if (control_plane_dma) else (format(int(LINK0_FTL_BAR2_CFG[4:],16),'#034b'))"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "f0bar2_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 2"
                    editable            = "EN_DMA_SUPPORT and ((link0_f0_bar2_enable and (not link0_f0_bar2_type)) or (link0_f0_bar1_enable and link0_f0_bar1_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f0_bar2_enable and (not link0_f0_bar2_type)) or (link0_f0_bar1_enable and link0_f0_bar1_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(f0bar2_to_locadr,link0_f0_bar1_unit,link0_f0_bar1_size,link0_f0_bar1_64b,link0_f0_bar1_enable,1) if(link0_f0_bar1_enable and link0_f0_bar1_64b) else loc_bar_drc(f0bar2_to_locadr,link0_f0_bar2_unit,link0_f0_bar2_size,link0_f0_bar2_64b,link0_f0_bar2_enable)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "F0BAR2_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ f0bar2_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 2"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar3_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Enable"
                    default             = "False"
                    editable            = "0 if(DEVICE_TYPE == 'Root Port') else (not (link0_f0_bar2_enable and link0_f0_bar2_64b))"
                    hidden              = "True if((DEVICE_TYPE == 'Root Port') or control_plane_dma) else ((link0_f0_bar2_enable and link0_f0_bar2_64b))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar3_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Resizable"
                    default             = "False"
                    editable            = "LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar3_enable"
                    hidden              = "not (LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar3_enable)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar3_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f0_bar3_enable and not link0_f0_bar3_resize_en"
                    hidden              = "not link0_f0_bar3_enable or link0_f0_bar3_resize_en"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar3_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f0_bar3_enable and (not link0_f0_bar3_type)"
                    hidden              = "not (link0_f0_bar3_enable and (not link0_f0_bar3_type))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar3_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f0_bar3_enable and (not link0_f0_bar3_type)"
                    hidden              = "not (link0_f0_bar3_enable and (not link0_f0_bar3_type))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_RBAR_CFG3_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 3 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_RBAR_CFG3_SUPPORTED_SIZES,5,link0_f0_bar3_64b)"
                    editable            = "link0_f0_bar3_resize_en"
                    hidden              = "not link0_f0_bar3_resize_en"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar3_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f0_bar3_type) else (3 if(link0_f0_bar3_64b) else 1)"
                    options             = "gen_bar_unit(link0_f0_bar3_type,link0_f0_bar3_64b,in_FTL_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar3_enable and (not link0_f0_bar3_type)"
                    hidden              = "not link0_f0_bar3_enable"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar3_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f0_bar3_type,link0_f0_bar3_64b,link0_f0_bar3_unit,in_FTL_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar3_enable"
                    hidden              = "not link0_f0_bar3_enable"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_BAR3_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar2_enable,link0_f0_bar2_pref,link0_f0_bar2_64b,link0_f0_bar2_unit,link0_f0_bar2_size,1)))) if(link0_f0_bar2_enable and link0_f0_bar2_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar3_enable,link0_f0_bar3_pref,link0_f0_bar3_64b,link0_f0_bar3_unit,link0_f0_bar3_size,0,link0_f0_bar3_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 3"
                    editable            = "0"
                    hidden              = "not (link0_f0_bar3_enable or (link0_f0_bar2_enable and link0_f0_bar2_64b))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_BAR3_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(AXIDMA_LINK0_FTL_BAR3_CFG[4:],16),'#034b') if (control_plane_dma) else (format(int(LINK0_FTL_BAR3_CFG[4:],16),'#034b'))"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "f0bar3_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 3"
                    editable            = "EN_DMA_SUPPORT and ((link0_f0_bar3_enable and (not link0_f0_bar3_type)) or (link0_f0_bar2_enable and link0_f0_bar2_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f0_bar3_enable and (not link0_f0_bar3_type)) or (link0_f0_bar2_enable and link0_f0_bar2_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(f0bar3_to_locadr,link0_f0_bar2_unit,link0_f0_bar2_size,link0_f0_bar2_64b,link0_f0_bar2_enable,1) if(link0_f0_bar2_enable and link0_f0_bar2_64b) else loc_bar_drc(f0bar3_to_locadr,link0_f0_bar3_unit,link0_f0_bar3_size,link0_f0_bar3_64b,link0_f0_bar3_enable)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "F0BAR3_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ f0bar3_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 3"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar4_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Enable"
                    default             = "False"
                    editable            = "0 if(DEVICE_TYPE == 'Root Port') else (not (link0_f0_bar3_enable and link0_f0_bar3_64b))"
                    hidden              = "True if((DEVICE_TYPE == 'Root Port') or control_plane_dma) else ((link0_f0_bar3_enable and link0_f0_bar3_64b))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar4_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Resizable"
                    default             = "False"
                    editable            = "LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar4_enable"
                    hidden              = "not (LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar4_enable)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar4_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f0_bar4_enable and not link0_f0_bar4_resize_en"
                    hidden              = "not link0_f0_bar4_enable or link0_f0_bar4_resize_en"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar4_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f0_bar4_enable and (not link0_f0_bar4_type)"
                    hidden              = "not (link0_f0_bar4_enable and (not link0_f0_bar4_type))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar4_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f0_bar4_enable and (not link0_f0_bar4_type)"
                    hidden              = "not (link0_f0_bar4_enable and (not link0_f0_bar4_type))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_RBAR_CFG4_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 4 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_RBAR_CFG4_SUPPORTED_SIZES,5,link0_f0_bar4_64b)"
                    editable            = "link0_f0_bar4_resize_en"
                    hidden              = "not link0_f0_bar4_resize_en"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar4_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f0_bar4_type) else (3 if(link0_f0_bar4_64b) else 1)"
                    options             = "gen_bar_unit(link0_f0_bar4_type,link0_f0_bar4_64b,in_FTL_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar4_enable and (not link0_f0_bar4_type)"
                    hidden              = "not link0_f0_bar4_enable"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar4_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f0_bar4_type,link0_f0_bar4_64b,link0_f0_bar4_unit,in_FTL_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar4_enable"
                    hidden              = "not link0_f0_bar4_enable"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_BAR4_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar3_enable,link0_f0_bar3_pref,link0_f0_bar3_64b,link0_f0_bar3_unit,link0_f0_bar3_size,1)))) if(link0_f0_bar3_enable and link0_f0_bar3_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar4_enable,link0_f0_bar4_pref,link0_f0_bar4_64b,link0_f0_bar4_unit,link0_f0_bar4_size,0,link0_f0_bar4_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 4"
                    editable            = "0"
                    hidden              = "not (link0_f0_bar4_enable or (link0_f0_bar3_enable and link0_f0_bar3_64b))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_BAR4_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(AXIDMA_LINK0_FTL_BAR4_CFG[4:],16),'#034b') if (control_plane_dma) else (format(int(LINK0_FTL_BAR4_CFG[4:],16),'#034b'))"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "f0bar4_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 4"
                    editable            = "EN_DMA_SUPPORT and ((link0_f0_bar4_enable and (not link0_f0_bar4_type)) or (link0_f0_bar3_enable and link0_f0_bar3_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f0_bar4_enable and (not link0_f0_bar4_type)) or (link0_f0_bar3_enable and link0_f0_bar3_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(f0bar4_to_locadr,link0_f0_bar3_unit,link0_f0_bar3_size,link0_f0_bar3_64b,link0_f0_bar3_enable,1) if(link0_f0_bar3_enable and link0_f0_bar3_64b) else loc_bar_drc(f0bar4_to_locadr,link0_f0_bar4_unit,link0_f0_bar4_size,link0_f0_bar4_64b,link0_f0_bar4_enable)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "F0BAR4_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ f0bar4_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 4"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar5_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Enable"
                    default             = "False"
                    editable            = "0 if(DEVICE_TYPE == 'Root Port') else (not (link0_f0_bar4_enable and link0_f0_bar4_64b))"
                    hidden              = "True if((DEVICE_TYPE == 'Root Port') or control_plane_dma) else ((link0_f0_bar4_enable and link0_f0_bar4_64b))"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar5_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Resizable"
                    default             = "False"
                    editable            = "LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar5_enable"
                    hidden              = "not (LINK0_FTL_RBAR_CAP_ENABLE and link0_f0_bar5_enable)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar5_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f0_bar5_enable and not link0_f0_bar5_resize_en"
                    hidden              = "not link0_f0_bar5_enable or link0_f0_bar5_resize_en"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar5_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : 64 bit address"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (0)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar5_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f0_bar5_enable and (not link0_f0_bar5_type)"
                    hidden              = "not (link0_f0_bar5_enable and (not link0_f0_bar5_type))"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_RBAR_CFG5_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 5 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_RBAR_CFG5_SUPPORTED_SIZES,5,link0_f0_bar5_64b)"
                    editable            = "link0_f0_bar5_resize_en"
                    hidden              = "not link0_f0_bar5_resize_en"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar5_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f0_bar5_type) else (3 if(link0_f0_bar5_64b) else 1)"
                    options             = "gen_bar_unit(link0_f0_bar5_type,link0_f0_bar5_64b,in_FTL_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar5_enable and (not link0_f0_bar5_type)"
                    hidden              = "not link0_f0_bar5_enable"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "link0_f0_bar5_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f0_bar5_type,link0_f0_bar5_64b,link0_f0_bar5_unit,in_FTL_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "link0_f0_bar5_enable"
                    hidden              = "not link0_f0_bar5_enable"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_BAR5_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar4_enable,link0_f0_bar4_pref,link0_f0_bar4_64b,link0_f0_bar4_unit,link0_f0_bar4_size,1)))) if(link0_f0_bar4_enable and link0_f0_bar4_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f0_bar5_enable,link0_f0_bar5_pref,link0_f0_bar5_64b,link0_f0_bar5_unit,link0_f0_bar5_size,0,link0_f0_bar5_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 5"
                    editable            = "0"
                    hidden              = "not (link0_f0_bar5_enable or (link0_f0_bar4_enable and link0_f0_bar4_64b))"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_BAR5_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(AXIDMA_LINK0_FTL_BAR5_CFG[4:],16),'#034b') if (control_plane_dma) else (format(int(LINK0_FTL_BAR5_CFG[4:],16),'#034b'))"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "f0bar5_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 5"
                    editable            = "EN_DMA_SUPPORT and ((link0_f0_bar5_enable and (not link0_f0_bar5_type)) or (link0_f0_bar4_enable and link0_f0_bar4_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f0_bar5_enable and (not link0_f0_bar5_type)) or (link0_f0_bar4_enable and link0_f0_bar4_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(f0bar5_to_locadr,link0_f0_bar4_unit,link0_f0_bar4_size,link0_f0_bar4_64b,link0_f0_bar4_enable,1) if(link0_f0_bar4_enable and link0_f0_bar4_64b) else loc_bar_drc(f0bar5_to_locadr,link0_f0_bar5_unit,link0_f0_bar5_size,link0_f0_bar5_64b,link0_f0_bar5_enable)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "F0BAR5_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ f0bar5_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 5"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "f0_rbar_params"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "calc_actual_rbar_params(LINK0_FTL_RBAR_CAP_ENABLE,
                                                                   [link0_f0_bar0_resize_en,
                                                                    link0_f0_bar1_resize_en,
                                                                    link0_f0_bar2_resize_en,
                                                                    link0_f0_bar3_resize_en,
                                                                    link0_f0_bar4_resize_en,
                                                                    link0_f0_bar5_resize_en],
                                                                   [in_FTL_RBAR_CFG0_SUPPORTED_SIZES,
                                                                    in_FTL_RBAR_CFG1_SUPPORTED_SIZES,
                                                                    in_FTL_RBAR_CFG2_SUPPORTED_SIZES,
                                                                    in_FTL_RBAR_CFG3_SUPPORTED_SIZES,
                                                                    in_FTL_RBAR_CFG4_SUPPORTED_SIZES,
                                                                    in_FTL_RBAR_CFG5_SUPPORTED_SIZES],
                                                                   [link0_f0_bar0_unit,
                                                                    link0_f0_bar1_unit,
                                                                    link0_f0_bar2_unit,
                                                                    link0_f0_bar3_unit,
                                                                    link0_f0_bar4_unit,
                                                                    link0_f0_bar5_unit],
                                                                   [link0_f0_bar0_size,
                                                                    link0_f0_bar1_size,
                                                                    link0_f0_bar2_size,
                                                                    link0_f0_bar3_size,
                                                                    link0_f0_bar4_size,
                                                                    link0_f0_bar5_size]
                                                                   )"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG0_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_def'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG1_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_def'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG2_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_def'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG3_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_def'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG4_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_def'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG5_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_def'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG0_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_idx'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG1_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_idx'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG2_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_idx'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG3_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_idx'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG4_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_idx'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG5_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_idx'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG0_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_sup'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG1_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_sup'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG2_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_sup'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG3_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_sup'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG4_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_sup'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_RBAR_CFG5_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "f0_rbar_params['rbar_sup'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_INTERRUPT_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable Legacy Interrupt"
                    default             = "True"
		    value_expr          = "not control_plane_dma"
                    editable            = "not control_plane_dma"
                    group1              = "Legacy Interrupt"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_INTERRUPT_PIN"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Interrupt Pin"
                    default             = "0"
                    options             = "[('INT A',0),('INT B',1),('INT C',2),('INT D',3)]"
                    editable            = "not LINK0_FTL_INTERRUPT_DISABLE"
                    hidden              = "LINK0_FTL_INTERRUPT_DISABLE"
                    group1              = "Legacy Interrupt"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_MSI_CAP_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    value_expr          = "False if (DMA_INTERRUPT == 1 and control_plane_dma) else (True if (DEVICE_TYPE == 'Root Port') else True)"
                    title               = "Disable MSI Capability"
                    default             = "False"
                    editable            = "0 if((DEVICE_TYPE == 'Root Port') or control_plane_dma) else 1"
                    hidden              = "(DEVICE_TYPE == 'Root Port')"
                    group1              = "MSI Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_MSI_CAP_MULT_MESSAGE_CAPABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Number of MSI vectors"
                    default             = "3"
		    value_expr          = "5 if control_plane_dma else 3"
                    options             = "[('1',0),('2',1),('4',2),('8',3),('16',4),('32',5)]"
                    editable            = "not LINK0_FTL_MSI_CAP_DISABLE and not control_plane_dma"
                    hidden              = "LINK0_FTL_MSI_CAP_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_MSI_CAP_VEC_MASK_CAPABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Vector Masking"
                    default             = "True"
		    value_expr          = "not control_plane_dma"
                    editable            = "not LINK0_FTL_MSI_CAP_DISABLE and (not control_plane_dma)"
                    hidden              = "LINK0_FTL_MSI_CAP_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_MSIX_CAP_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    value_expr          = "False if (DMA_INTERRUPT == 2 and control_plane_dma) else True"
                    title               = "Disable MSI-X Capability"
                    default             = "True"
                    editable            = "0 if((DEVICE_TYPE == 'Root Port') or control_plane_dma) else 1"
                    hidden              = "(DEVICE_TYPE == 'Root Port')"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "mgmt_ftl_msix_cap_table_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X Table Size"
                    value_expr          = "8 if (USR_DAT_IF_MODE == 0) else (calc_msix_table_entries(NUM_USR_INT,NUM_H2F_CHAN,NUM_F2H_CHAN))"
                    value_range         = "(1,2048)"
                    editable            = "not (LINK0_FTL_MSIX_CAP_DISABLE or control_plane_dma)"
                    hidden              = "LINK0_FTL_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_MSIX_CAP_TABLE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "mgmt_ftl_msix_cap_table_size-1"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_MSIX_CAP_TABLE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_FTL_MSIX_CAP_TABLE_SIZE,'#013b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_MSIX_TABLE_BIR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X Table BAR indicator"
                    default             = "0"
                    options             = " gen_msix_bar_opts(axidma_link0_f0_bar0_enable,axidma_link0_f0_bar1_enable,axidma_link0_f0_bar2_enable,axidma_link0_f0_bar3_enable,axidma_link0_f0_bar4_enable,axidma_link0_f0_bar5_enable) if control_plane_dma else (gen_msix_bar_opts(link0_f0_bar0_enable,link0_f0_bar1_enable,link0_f0_bar2_enable,link0_f0_bar3_enable,link0_f0_bar4_enable,link0_f0_bar5_enable))"
                    value_expr          = "(gen_msix_bar_opts(axidma_link0_f0_bar0_enable,axidma_link0_f0_bar1_enable,axidma_link0_f0_bar2_enable,axidma_link0_f0_bar3_enable,axidma_link0_f0_bar4_enable,axidma_link0_f0_bar5_enable)[0][1]) if control_plane_dma else (gen_msix_bar_opts(link0_f0_bar0_enable,link0_f0_bar1_enable,link0_f0_bar2_enable,link0_f0_bar3_enable,link0_f0_bar4_enable,link0_f0_bar5_enable)[0][1])"
                    drc                 = "(axidma_link0_f0_bar0_enable or axidma_link0_f0_bar1_enable or axidma_link0_f0_bar2_enable or axidma_link0_f0_bar3_enable or axidma_link0_f0_bar4_enable or axidma_link0_f0_bar5_enable) if control_plane_dma else (link0_f0_bar0_enable or link0_f0_bar1_enable or link0_f0_bar2_enable or link0_f0_bar3_enable or link0_f0_bar4_enable or link0_f0_bar5_enable)"
                    editable            = "not (LINK0_FTL_MSIX_CAP_DISABLE or control_plane_dma)"
                    hidden              = "LINK0_FTL_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "mgmt_ftl_msix_table_offset"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "MSI-X Table Address Offset (8bytes aligned)"
                    value_expr          = "'8000' if (control_plane_dma) else '6000'"
                    drc                 = "hex_value_drc(mgmt_ftl_msix_table_offset,8) and ((mgmt_ftl_msix_table_offset[-1] == '0') or (mgmt_ftl_msix_table_offset[-1] == '8'))"
                    editable            = "not (LINK0_FTL_MSIX_CAP_DISABLE or control_plane_dma)"
                    hidden              = "LINK0_FTL_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_MSIX_TABLE_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('29\'h'+ ('%x' % (int(mgmt_ftl_msix_table_offset,16)//8))) if(hex_value_drc(mgmt_ftl_msix_table_offset,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_MSIX_TABLE_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MSIX_TABLE_OFFSET[4:],16),'#031b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_MSIX_PBA_BIR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X PBA BAR indicator"
                    default             = "0"
                    options             = " gen_msix_bar_opts(axidma_link0_f0_bar0_enable,axidma_link0_f0_bar1_enable,axidma_link0_f0_bar2_enable,axidma_link0_f0_bar3_enable,axidma_link0_f0_bar4_enable,axidma_link0_f0_bar5_enable) if control_plane_dma else (gen_msix_bar_opts(link0_f0_bar0_enable,link0_f0_bar1_enable,link0_f0_bar2_enable,link0_f0_bar3_enable,link0_f0_bar4_enable,link0_f0_bar5_enable))"
                    value_expr          = "(gen_msix_bar_opts(axidma_link0_f0_bar0_enable,axidma_link0_f0_bar1_enable,axidma_link0_f0_bar2_enable,axidma_link0_f0_bar3_enable,axidma_link0_f0_bar4_enable,axidma_link0_f0_bar5_enable)[0][1]) if control_plane_dma else (gen_msix_bar_opts(link0_f0_bar0_enable,link0_f0_bar1_enable,link0_f0_bar2_enable,link0_f0_bar3_enable,link0_f0_bar4_enable,link0_f0_bar5_enable)[0][1])"
                    drc                 = "(axidma_link0_f0_bar0_enable or axidma_link0_f0_bar1_enable or axidma_link0_f0_bar2_enable or axidma_link0_f0_bar3_enable or axidma_link0_f0_bar4_enable or axidma_link0_f0_bar5_enable) if control_plane_dma else (link0_f0_bar0_enable or link0_f0_bar1_enable or link0_f0_bar2_enable or link0_f0_bar3_enable or link0_f0_bar4_enable or link0_f0_bar5_enable)"
                    editable            = "not (LINK0_FTL_MSIX_CAP_DISABLE or control_plane_dma)"
                    hidden              = "LINK0_FTL_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "mgmt_ftl_msix_pba_offset"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "MSI-X PBA Address Offset (8bytes aligned)"
                    value_expr          = "'C000' if (control_plane_dma) else '7000'"
                    drc                 = "hex_value_drc(mgmt_ftl_msix_pba_offset,8) and ((mgmt_ftl_msix_pba_offset[-1] == '0') or (mgmt_ftl_msix_pba_offset[-1] == '8'))"
                    editable            = "not (LINK0_FTL_MSIX_CAP_DISABLE or control_plane_dma)"
                    hidden              = "LINK0_FTL_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_MSIX_PBA_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('29\'h'+ ('%x' % (int(mgmt_ftl_msix_pba_offset,16)//8))) if(hex_value_drc(mgmt_ftl_msix_pba_offset,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_MSIX_PBA_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MSIX_PBA_OFFSET[4:],16),'#031b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_DSN_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable DSN Capability"
                    default             = "False"
                    editable            = "not control_plane_dma"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "mgmt_ftl_dsn_serial_number"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Serial Number"
                    default             = "0"
                    drc                 = "hex_value_drc(mgmt_ftl_dsn_serial_number,16)"
                    editable            = "LINK0_FTL_DSN_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_DSN_CAP_ENABLE"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DSN_SERIAL_NUMBER"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('64\'h'+ mgmt_ftl_dsn_serial_number)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_DSN_SERIAL_NUMBER_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(bitwise_and((int(mgmt_ftl_dsn_serial_number,16)//(2**32)),(0xFFFFFFFF)),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "FTL_DSN_SERIAL_NUMBER_L"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(bitwise_and(int(mgmt_ftl_dsn_serial_number,16),(0xFFFFFFFF)),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_PCIE_DEV_CAP_MAX_PAYLOAD_SIZE_SUPPORTED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Maximum Payload Size Supported"
                    options             = "['128_BYTES', '256_BYTES', '512_BYTES']"
                    value_expr          = "'512_BYTES' if control_plane_dma else '256_BYTES'"
                    default             = "256_BYTES'"
                    editable            = "1"
                    group1              = "PCI Express Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_PCIE_DEV_CAP_MAX_PAYLOAD_SIZE_SUPPORTED_INPUT"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Maximum Payload Size Supported"
                    value_expr          = "0 if (LINK0_FTL_PCIE_DEV_CAP_MAX_PAYLOAD_SIZE_SUPPORTED == '128_BYTES') else 1 if (LINK0_FTL_PCIE_DEV_CAP_MAX_PAYLOAD_SIZE_SUPPORTED == '256_BYTES') else 2"
                    hidden              = "True" 
                    editable            = "False"
                    group1              = "PCI Express Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_PCIE_DEV_CAP_DISABLE_FLR_CAPABILITY"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable Function Level Reset (FLR)"
                    default             = "True"
                    editable            = "not control_plane_dma"
                    group1              = "PCI Express Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_PCIE_DEV_CAP_EXTENDED_TAG_FIELD_SUPPORTED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Extended Tag Field"
                    default             = "True"
                    editable            = "not control_plane_dma"
                    group1              = "PCI Express Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DS_PORT_RCB"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    options             = "[('64 byte',0),('128 byte',1)]"
                    title               = "Root Port RCB"
                    description         = "Indicates the Read Completion Boundary when operating as Root Port."
                    default             = "0"
                    editable            = "1 if (DEVICE_TYPE == 'Root Port') else 0"
                    hidden              = "(DEVICE_TYPE != 'Root Port')"
                    group1              = "PCI Express Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_AER_CAP_ECRC_GEN_CHK_CAPABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable ECRC Generation and Checking"
		    value_expr          = "False if control_plane_dma else True"
                    default             = "True"
                    editable            = "not control_plane_dma"
                    group1              = "Advance Error Reporting Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_PTL_TLP_TX_TD1_MEANS_ADD_HAS_N"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    value_expr          = "LINK0_FTL_AER_CAP_ECRC_GEN_CHK_CAPABLE"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Advance Error Reporting Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_AER_CAP_EN_CORR_INTERNAL_ERROR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Reporting : Correctable Internal Error"
                    default             = "False"
                    editable            = "not control_plane_dma"
                    group1              = "Advance Error Reporting Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_AER_CAP_EN_SURPRISE_DOWN_ERROR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Reporting : Surprise Down Error"
                    default             = "False"
                    editable            = "0 if((DEVICE_TYPE == 'Root Port') or control_plane_dma) else 1"
                    group1              = "Advance Error Reporting Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_AER_CAP_EN_COMPLETION_TIMEOUT"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Reporting : Completion Timeout Error"
                    default             = "True"
		    value_expr          = "False if control_plane_dma else True"
                    editable            = "not control_plane_dma"
                    group1              = "Advance Error Reporting Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_AER_CAP_EN_COMPLETER_ABORT"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Reporting : Completer Abort Error"
                    default             = "False"
                    editable            = "not control_plane_dma"
                    group1              = "Advance Error Reporting Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_AER_CAP_EN_UCORR_INTERNAL_ERROR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Reporting : Uncorrectable Internal Error"
                    default             = "False"
                    editable            = "not control_plane_dma"
                    group1              = "Advance Error Reporting Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_ATS_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable ATS Capability"
                    default             = "False"
                    editable            = "not control_plane_dma"
                    group1              = "ATS Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Atomic Op Capability"
                    default             = "False"
                    editable            = "not control_plane_dma"
                    group1              = "Atomic OP Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_ATOMIC_OP_CAP_RP_COMPLETER_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Root as Atomic Op Completer"
                    default             = "False"
                    editable            = "LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    group1              = "Atomic OP Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_ATOMIC_OP_CAP_COMPLETER_128_SUPPORTED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Atomic Op Completer 128b Operand"
                    default             = "True"
                    editable            = "LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    group1              = "Atomic OP Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_ATOMIC_OP_CAP_COMPLETER_64_SUPPORTED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Atomic Op Completer 64b Operand"
                    default             = "True"
                    editable            = "LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    group1              = "Atomic OP Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_ATOMIC_OP_CAP_COMPLETER_32_SUPPORTED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Atomic Op Completer 32b Operand"
                    default             = "True"
                    editable            = "LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    group1              = "Atomic OP Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_ATOMIC_OP_CAP_ROUTING_SUPPORTED"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Atomic Op Routing Support"
                    default             = "False"
                    editable            = "LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_ATOMIC_OP_CAP_ENABLE"
                    group1              = "Atomic OP Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_LTR_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable LTR Capability"
                    default             = "False"
                    editable            = "not control_plane_dma"
                    group1              = "Latency Tolerance Reporting Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_PWR_BUDGET_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable PB Capability"
                    default             = "False"
                    editable            = "not control_plane_dma"
                    group1              = "Power Budgeting Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "LINK0_FTL_DPA_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable DPA Capability"
                    default             = "False"
                    editable            = "not control_plane_dma"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DPA_CAP_SUBSTATE_MAX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Max Substate Number"
                    value_range         = "(0,31)"
                    default             = "0"
                    editable            = "LINK0_FTL_DPA_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_DPA_CAP_ENABLE"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DPA_CAP_TLUNIT"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Transition Latency Unit"
                    options             = "[('1 ms',0), ('10 ms', 1), ('100 ms', 2)]"
                    default             = "0"
                    editable            = "LINK0_FTL_DPA_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_DPA_CAP_ENABLE"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DPA_CAP_PAS"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Power Allocation Scale"
                    options             = "[('10.0x',0), ('1.0x', 1), ('0.1x', 2), ('0.01x', 3)]"
                    default             = "0"
                    editable            = "LINK0_FTL_DPA_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_DPA_CAP_ENABLE"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DPA_CAP_XLCY0"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Transition Latency Value 0"
                    value_range         = "(0,255)"
                    default             = "0"
                    editable            = "LINK0_FTL_DPA_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_DPA_CAP_ENABLE"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DPA_CAP_XLCY1"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Transition Latency Value 1"
                    value_range         = "(0,255)"
                    default             = "0"
                    editable            = "LINK0_FTL_DPA_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_DPA_CAP_ENABLE"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_DPA_XLCY_INDICATOR"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Transition Latency Indicator 32x1b (32'h)"
                    default             = "00000000"
                    drc                 = "hex_value_drc(in_FTL_DPA_XLCY_INDICATOR,8)"
                    editable            = "LINK0_FTL_DPA_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_DPA_CAP_ENABLE"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DPA_XLCY_INDICATOR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%s' % in_FTL_DPA_XLCY_INDICATOR))"
                    output_formatter    = "nostr"
                    hidden              = "True"
                    editable            = "0"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "in_FTL_DPA_ALLOC_ARRAY"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Power Allocation Array 32x8b (256'h)"
                    default             = "0000000000000000000000000000000000000000000000000000000000000000"
                    drc                 = "hex_value_drc(in_FTL_DPA_ALLOC_ARRAY,64)"
                    editable            = "LINK0_FTL_DPA_CAP_ENABLE"
                    hidden              = "not LINK0_FTL_DPA_CAP_ENABLE"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <lsccip:setting id                  = "MGMT_FTL_DPA_ALLOC_ARRAY"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('256\'h'+ ('%s' % in_FTL_DPA_ALLOC_ARRAY))"
                    output_formatter    = "nostr"
                    hidden              = "True"
                    editable            = "0"
                    group1              = "Dynamic Power Allocation Capability"
                    group2              = "Function 0"
    />

    <!--Multi Function-->
    <!--Function 1-->
    <lsccip:setting id                  = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable Function 1"
                    default             = "True"
                    editable            = "(LINK0_NUM_FUNCTIONS-1)"
                    value_expr          = "True if (LINK0_NUM_FUNCTIONS == 1) else False"
                    hidden              = "not (LINK0_NUM_FUNCTIONS-1)"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_ID1_DEVICE_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Device ID (16'h)"
                    default             = "9C1D"
                    drc                 = "hex_value_drc(in_FTL_MF1_ID1_DEVICE_ID,4)"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_ID1_DEVICE_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('16\'h'+ ('%s' % in_FTL_MF1_ID1_DEVICE_ID)) if(not MGMT_FTL_MF1_FUNCTION_DISABLE) else ('16\'h'+ ('%s' % 'FFFF'))"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_ID1_DEVICE_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF1_ID1_DEVICE_ID,16),'#018b') if(not MGMT_FTL_MF1_FUNCTION_DISABLE) else format(int('FFFF',16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_ID1_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Vendor ID (16'h)"
                    default             = "19AA"
                    drc                 = "hex_value_drc(in_FTL_MF1_ID1_VENDOR_ID,4)"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_ID1_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('16\'h'+ ('%s' % in_FTL_MF1_ID1_VENDOR_ID)) if(not MGMT_FTL_MF1_FUNCTION_DISABLE) else ('16\'h'+ ('%s' % 'FFFF'))"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_ID1_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF1_ID1_VENDOR_ID,16),'#018b') if(not MGMT_FTL_MF1_FUNCTION_DISABLE) else format(int('FFFF',16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_ID2_SUBSYSTEM_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem ID (16'h)"
                    default             = "E004"
                    drc                 = "hex_value_drc(in_FTL_MF1_ID2_SUBSYSTEM_ID,4)"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_ID2_SUBSYSTEM_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_MF1_ID2_SUBSYSTEM_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_ID2_SUBSYSTEM_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF1_ID2_SUBSYSTEM_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem Vendor ID (16'h)"
                    default             = "19AA"
                    drc                 = "hex_value_drc(in_FTL_MF1_ID2_SUBSYSTEM_VENDOR_ID,4)"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_MF1_ID2_SUBSYSTEM_VENDOR_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF1_ID2_SUBSYSTEM_VENDOR_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_ID3_CLASS_CODE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Class Code (24'h)"
                    default             = "118000"
                    drc                 = "hex_value_drc(in_FTL_MF1_ID3_CLASS_CODE,6)"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_ID3_CLASS_CODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'24\'h'+ ('%s' % in_FTL_MF1_ID3_CLASS_CODE)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_ID3_CLASS_CODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF1_ID3_CLASS_CODE,16),'#026b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_ID3_REVISION_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Revision ID (8'h)"
                    default             = "04"
                    drc                 = "hex_value_drc(in_FTL_MF1_ID3_REVISION_ID,2)"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_ID3_REVISION_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'8\'h'+ ('%s' % in_FTL_MF1_ID3_REVISION_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_ID3_REVISION_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF1_ID3_REVISION_ID,16),'#010b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CAP_ENABLE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Resizable BAR Capability"
                    default             = "False"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar0_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Enable"
                    default             = "False"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar0_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar0_enable"
                    hidden              = "not (MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar0_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f1_bar0_enable and not link0_f1_bar0_resize_en"
                    hidden              = "not link0_f1_bar0_enable or link0_f1_bar0_resize_en"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar0_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f1_bar0_enable and (not link0_f1_bar0_type)"
                    hidden              = "not (link0_f1_bar0_enable and (not link0_f1_bar0_type))"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar0_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f1_bar0_enable and (not link0_f1_bar0_type)"
                    hidden              = "not (link0_f1_bar0_enable and (not link0_f1_bar0_type))"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_RBAR_CFG0_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 0 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF1_RBAR_CFG0_SUPPORTED_SIZES,5,link0_f1_bar0_64b)"
                    editable            = "link0_f1_bar0_resize_en"
                    hidden              = "not link0_f1_bar0_resize_en"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar0_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (unit)"
                    default             = "0"
                    options             = "gen_bar_unit(link0_f1_bar0_type,link0_f1_bar0_64b,in_FTL_MF1_RBAR_CFG0_SUPPORTED_SIZES)"
                    value_expr          = "0 if(link0_f1_bar0_type) else (3 if(link0_f1_bar0_64b) else 1)"
                    editable            = "link0_f1_bar0_enable and (not link0_f1_bar0_type)"
                    hidden              = "not link0_f1_bar0_enable"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar0_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f1_bar0_type,link0_f1_bar0_64b,link0_f1_bar0_unit,in_FTL_MF1_RBAR_CFG0_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar0_enable"
                    hidden              = "not link0_f1_bar0_enable"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_BAR0_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ ('%08x' % ((calc_bar_size(link0_f1_bar0_enable,link0_f1_bar0_pref,link0_f1_bar0_64b,link0_f1_bar0_unit,link0_f1_bar0_size,0,link0_f1_bar0_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 0"
                    editable            = "0"
                    hidden              = "not (link0_f1_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_BAR0_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF1_BAR0_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar0_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 0"
                    editable            = "EN_DMA_SUPPORT and link0_f1_bar0_enable and (not link0_f1_bar0_type)"
                    hidden              = "not (EN_DMA_SUPPORT and link0_f1_bar0_enable and (not link0_f1_bar0_type))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f1_bar0_to_locadr,link0_f1_bar0_unit,link0_f1_bar0_size,link0_f1_bar0_64b,link0_f1_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "F1BAR0_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f1_bar0_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 0"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar1_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f1_bar0_enable and link0_f1_bar0_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    hidden              = "((link0_f1_bar0_enable and link0_f1_bar0_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar1_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar1_enable"
                    hidden              = "not (MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar1_enable)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar1_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f1_bar1_enable and not link0_f1_bar1_resize_en"
                    hidden              = "not link0_f1_bar1_enable or link0_f1_bar1_resize_en"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar1_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f1_bar1_enable and (not link0_f1_bar1_type)"
                    hidden              = "not (link0_f1_bar1_enable and (not link0_f1_bar1_type))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar1_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f1_bar1_enable and (not link0_f1_bar1_type)"
                    hidden              = "not (link0_f1_bar1_enable and (not link0_f1_bar1_type))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_RBAR_CFG1_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 1 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF1_RBAR_CFG1_SUPPORTED_SIZES,5,link0_f1_bar1_64b)"
                    editable            = "link0_f1_bar1_resize_en"
                    hidden              = "not link0_f1_bar1_resize_en"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar1_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f1_bar1_type) else (3 if(link0_f1_bar1_64b) else 1)"
                    options             = "gen_bar_unit(link0_f1_bar1_type,link0_f1_bar1_64b,in_FTL_MF1_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar1_enable and (not link0_f1_bar1_type)"
                    hidden              = "not link0_f1_bar1_enable"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar1_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f1_bar1_type,link0_f1_bar1_64b,link0_f1_bar1_unit,in_FTL_MF1_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar1_enable"
                    hidden              = "not link0_f1_bar1_enable"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_BAR1_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar0_enable,link0_f1_bar0_pref,link0_f1_bar0_64b,link0_f1_bar0_unit,link0_f1_bar0_size,1)))) if(link0_f1_bar0_enable and link0_f1_bar0_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar1_enable,link0_f1_bar1_pref,link0_f1_bar1_64b,link0_f1_bar1_unit,link0_f1_bar1_size,0,link0_f1_bar1_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 1"
                    editable            = "0"
                    hidden              = "not (link0_f1_bar1_enable or (link0_f1_bar0_enable and link0_f1_bar0_64b))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_BAR1_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF1_BAR1_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar1_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 1"
                    editable            = "EN_DMA_SUPPORT and ((link0_f1_bar1_enable and (not link0_f1_bar1_type)) or (link0_f1_bar0_enable and link0_f1_bar0_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f1_bar1_enable and (not link0_f1_bar1_type)) or (link0_f1_bar0_enable and link0_f1_bar0_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f1_bar1_to_locadr,link0_f1_bar0_unit,link0_f1_bar0_size,link0_f1_bar0_64b,link0_f1_bar0_enable,1) if(link0_f1_bar0_enable and link0_f1_bar0_64b) else loc_bar_drc(link0_f1_bar1_to_locadr,link0_f1_bar1_unit,link0_f1_bar1_size,link0_f1_bar1_64b,link0_f1_bar1_enable)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "F1BAR1_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f1_bar1_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 1"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar2_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f1_bar1_enable and link0_f1_bar1_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    hidden              = "((link0_f1_bar1_enable and link0_f1_bar1_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar2_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar2_enable"
                    hidden              = "not (MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar2_enable)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar2_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f1_bar2_enable and not link0_f1_bar2_resize_en"
                    hidden              = "not link0_f1_bar2_enable or link0_f1_bar2_resize_en"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar2_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f1_bar2_enable and (not link0_f1_bar2_type)"
                    hidden              = "not (link0_f1_bar2_enable and (not link0_f1_bar2_type))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar2_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f1_bar2_enable and (not link0_f1_bar2_type)"
                    hidden              = "not (link0_f1_bar2_enable and (not link0_f1_bar2_type))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_RBAR_CFG2_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 2 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF1_RBAR_CFG2_SUPPORTED_SIZES,5,link0_f1_bar2_64b)"
                    editable            = "link0_f1_bar2_resize_en"
                    hidden              = "not link0_f1_bar2_resize_en"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar2_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f1_bar2_type) else (3 if(link0_f1_bar2_64b) else 1)"
                    options             = "gen_bar_unit(link0_f1_bar2_type,link0_f1_bar2_64b,in_FTL_MF1_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar2_enable and (not link0_f1_bar2_type)"
                    hidden              = "not link0_f1_bar2_enable"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar2_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f1_bar2_type,link0_f1_bar2_64b,link0_f1_bar2_unit,in_FTL_MF1_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar2_enable"
                    hidden              = "not link0_f1_bar2_enable"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_BAR2_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar1_enable,link0_f1_bar1_pref,link0_f1_bar1_64b,link0_f1_bar1_unit,link0_f1_bar1_size,1)))) if(link0_f1_bar1_enable and link0_f1_bar1_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar2_enable,link0_f1_bar2_pref,link0_f1_bar2_64b,link0_f1_bar2_unit,link0_f1_bar2_size,0,link0_f1_bar2_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 2"
                    editable            = "0"
                    hidden              = "not (link0_f1_bar2_enable or (link0_f1_bar1_enable and link0_f1_bar1_64b))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_BAR2_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF1_BAR2_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar2_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 2"
                    editable            = "EN_DMA_SUPPORT and ((link0_f1_bar2_enable and (not link0_f1_bar2_type)) or (link0_f1_bar1_enable and link0_f1_bar1_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f1_bar2_enable and (not link0_f1_bar2_type)) or (link0_f1_bar1_enable and link0_f1_bar1_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f1_bar2_to_locadr,link0_f1_bar1_unit,link0_f1_bar1_size,link0_f1_bar1_64b,link0_f1_bar1_enable,1) if(link0_f1_bar1_enable and link0_f1_bar1_64b) else loc_bar_drc(link0_f1_bar2_to_locadr,link0_f1_bar2_unit,link0_f1_bar2_size,link0_f1_bar2_64b,link0_f1_bar2_enable)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "F1BAR2_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f1_bar2_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 2"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar3_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f1_bar2_enable and link0_f1_bar2_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    hidden              = "((link0_f1_bar2_enable and link0_f1_bar2_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar3_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar3_enable"
                    hidden              = "not (MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar3_enable)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar3_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f1_bar3_enable and not link0_f1_bar3_resize_en"
                    hidden              = "not link0_f1_bar3_enable or link0_f1_bar3_resize_en"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar3_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f1_bar3_enable and (not link0_f1_bar3_type)"
                    hidden              = "not (link0_f1_bar3_enable and (not link0_f1_bar3_type))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar3_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f1_bar3_enable and (not link0_f1_bar3_type)"
                    hidden              = "not (link0_f1_bar3_enable and (not link0_f1_bar3_type))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_RBAR_CFG3_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 3 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF1_RBAR_CFG3_SUPPORTED_SIZES,5,link0_f1_bar3_64b)"
                    editable            = "link0_f1_bar3_resize_en"
                    hidden              = "not link0_f1_bar3_resize_en"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar3_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f1_bar3_type) else (3 if(link0_f1_bar3_64b) else 1)"
                    options             = "gen_bar_unit(link0_f1_bar3_type,link0_f1_bar3_64b,in_FTL_MF1_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar3_enable and (not link0_f1_bar3_type)"
                    hidden              = "not link0_f1_bar3_enable"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar3_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f1_bar3_type,link0_f1_bar3_64b,link0_f1_bar3_unit,in_FTL_MF1_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar3_enable"
                    hidden              = "not link0_f1_bar3_enable"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_BAR3_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar2_enable,link0_f1_bar2_pref,link0_f1_bar2_64b,link0_f1_bar2_unit,link0_f1_bar2_size,1)))) if(link0_f1_bar2_enable and link0_f1_bar2_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar3_enable,link0_f1_bar3_pref,link0_f1_bar3_64b,link0_f1_bar3_unit,link0_f1_bar3_size,0,link0_f1_bar3_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 3"
                    editable            = "0"
                    hidden              = "not (link0_f1_bar3_enable or (link0_f1_bar2_enable and link0_f1_bar2_64b))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_BAR3_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF1_BAR3_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar3_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 3"
                    editable            = "EN_DMA_SUPPORT and ((link0_f1_bar3_enable and (not link0_f1_bar3_type)) or (link0_f1_bar2_enable and link0_f1_bar2_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f1_bar3_enable and (not link0_f1_bar3_type)) or (link0_f1_bar2_enable and link0_f1_bar2_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f1_bar3_to_locadr,link0_f1_bar2_unit,link0_f1_bar2_size,link0_f1_bar2_64b,link0_f1_bar2_enable,1) if(link0_f1_bar2_enable and link0_f1_bar2_64b) else loc_bar_drc(link0_f1_bar3_to_locadr,link0_f1_bar3_unit,link0_f1_bar3_size,link0_f1_bar3_64b,link0_f1_bar3_enable)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "F1BAR3_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f1_bar3_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 3"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar4_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f1_bar3_enable and link0_f1_bar3_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    hidden              = "((link0_f1_bar3_enable and link0_f1_bar3_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar4_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar4_enable"
                    hidden              = "not (MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar4_enable)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar4_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f1_bar4_enable and not link0_f1_bar4_resize_en"
                    hidden              = "not link0_f1_bar4_enable or link0_f1_bar4_resize_en"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar4_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f1_bar4_enable and (not link0_f1_bar4_type)"
                    hidden              = "not (link0_f1_bar4_enable and (not link0_f1_bar4_type))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar4_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f1_bar4_enable and (not link0_f1_bar4_type)"
                    hidden              = "not (link0_f1_bar4_enable and (not link0_f1_bar4_type))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_RBAR_CFG4_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 4 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF1_RBAR_CFG4_SUPPORTED_SIZES,5,link0_f1_bar4_64b)"
                    editable            = "link0_f1_bar4_resize_en"
                    hidden              = "not link0_f1_bar4_resize_en"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar4_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f1_bar4_type) else (3 if(link0_f1_bar4_64b) else 1)"
                    options             = "gen_bar_unit(link0_f1_bar4_type,link0_f1_bar4_64b,in_FTL_MF1_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar4_enable and (not link0_f1_bar4_type)"
                    hidden              = "not link0_f1_bar4_enable"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar4_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f1_bar4_type,link0_f1_bar4_64b,link0_f1_bar4_unit,in_FTL_MF1_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar4_enable"
                    hidden              = "not link0_f1_bar4_enable"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_BAR4_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar3_enable,link0_f1_bar3_pref,link0_f1_bar3_64b,link0_f1_bar3_unit,link0_f1_bar3_size,1)))) if(link0_f1_bar3_enable and link0_f1_bar3_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar4_enable,link0_f1_bar4_pref,link0_f1_bar4_64b,link0_f1_bar4_unit,link0_f1_bar4_size,0,link0_f1_bar4_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 4"
                    editable            = "0"
                    hidden              = "not (link0_f1_bar4_enable or (link0_f1_bar3_enable and link0_f1_bar3_64b))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_BAR4_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF1_BAR4_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar4_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 4"
                    editable            = "EN_DMA_SUPPORT and ((link0_f1_bar4_enable and (not link0_f1_bar4_type)) or (link0_f1_bar3_enable and link0_f1_bar3_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f1_bar4_enable and (not link0_f1_bar4_type)) or (link0_f1_bar3_enable and link0_f1_bar3_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f1_bar4_to_locadr,link0_f1_bar3_unit,link0_f1_bar3_size,link0_f1_bar3_64b,link0_f1_bar3_enable,1) if(link0_f1_bar3_enable and link0_f1_bar3_64b) else loc_bar_drc(link0_f1_bar4_to_locadr,link0_f1_bar4_unit,link0_f1_bar4_size,link0_f1_bar4_64b,link0_f1_bar4_enable)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "F1BAR4_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f1_bar4_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 4"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar5_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f1_bar4_enable and link0_f1_bar4_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    hidden              = "((link0_f1_bar4_enable and link0_f1_bar4_64b) or MGMT_FTL_MF1_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar5_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar5_enable"
                    hidden              = "not (MGMT_FTL_MF1_RBAR_CAP_ENABLE and link0_f1_bar5_enable)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar5_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f1_bar5_enable and not link0_f1_bar5_resize_en"
                    hidden              = "not link0_f1_bar5_enable or link0_f1_bar5_resize_en"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar5_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : 64 bit address"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (0)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar5_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f1_bar5_enable and (not link0_f1_bar5_type)"
                    hidden              = "not (link0_f1_bar5_enable and (not link0_f1_bar5_type))"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "in_FTL_MF1_RBAR_CFG5_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 5 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF1_RBAR_CFG5_SUPPORTED_SIZES,5,link0_f1_bar5_64b)"
                    editable            = "link0_f1_bar5_resize_en"
                    hidden              = "not link0_f1_bar5_resize_en"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar5_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f1_bar5_type) else (3 if(link0_f1_bar5_64b) else 1)"
                    options             = "gen_bar_unit(link0_f1_bar5_type,link0_f1_bar5_64b,in_FTL_MF1_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar5_enable and (not link0_f1_bar5_type)"
                    hidden              = "not link0_f1_bar5_enable"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar5_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f1_bar5_type,link0_f1_bar5_64b,link0_f1_bar5_unit,in_FTL_MF1_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "link0_f1_bar5_enable"
                    hidden              = "not link0_f1_bar5_enable"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_BAR5_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar4_enable,link0_f1_bar4_pref,link0_f1_bar4_64b,link0_f1_bar4_unit,link0_f1_bar4_size,1)))) if(link0_f1_bar4_enable and link0_f1_bar4_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f1_bar5_enable,link0_f1_bar5_pref,link0_f1_bar5_64b,link0_f1_bar5_unit,link0_f1_bar5_size,0,link0_f1_bar5_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 5"
                    editable            = "0"
                    hidden              = "not (link0_f1_bar5_enable or (link0_f1_bar4_enable and link0_f1_bar4_64b))"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_BAR5_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF1_BAR5_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_bar5_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 5"
                    editable            = "EN_DMA_SUPPORT and ((link0_f1_bar5_enable and (not link0_f1_bar5_type)) or (link0_f1_bar4_enable and link0_f1_bar4_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f1_bar5_enable and (not link0_f1_bar5_type)) or (link0_f1_bar4_enable and link0_f1_bar4_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f1_bar5_to_locadr,link0_f1_bar4_unit,link0_f1_bar4_size,link0_f1_bar4_64b,link0_f1_bar4_enable,1) if(link0_f1_bar4_enable and link0_f1_bar4_64b) else loc_bar_drc(link0_f1_bar5_to_locadr,link0_f1_bar5_unit,link0_f1_bar5_size,link0_f1_bar5_64b,link0_f1_bar5_enable)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "F1BAR5_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f1_bar5_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 5"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "link0_f1_rbar_params"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "calc_actual_rbar_params(MGMT_FTL_MF1_RBAR_CAP_ENABLE,
                                                                   [link0_f1_bar0_resize_en,
                                                                    link0_f1_bar1_resize_en,
                                                                    link0_f1_bar2_resize_en,
                                                                    link0_f1_bar3_resize_en,
                                                                    link0_f1_bar4_resize_en,
                                                                    link0_f1_bar5_resize_en],
                                                                   [in_FTL_MF1_RBAR_CFG0_SUPPORTED_SIZES,
                                                                    in_FTL_MF1_RBAR_CFG1_SUPPORTED_SIZES,
                                                                    in_FTL_MF1_RBAR_CFG2_SUPPORTED_SIZES,
                                                                    in_FTL_MF1_RBAR_CFG3_SUPPORTED_SIZES,
                                                                    in_FTL_MF1_RBAR_CFG4_SUPPORTED_SIZES,
                                                                    in_FTL_MF1_RBAR_CFG5_SUPPORTED_SIZES],
                                                                   [link0_f1_bar0_unit,
                                                                    link0_f1_bar1_unit,
                                                                    link0_f1_bar2_unit,
                                                                    link0_f1_bar3_unit,
                                                                    link0_f1_bar4_unit,
                                                                    link0_f1_bar5_unit],
                                                                   [link0_f1_bar0_size,
                                                                    link0_f1_bar1_size,
                                                                    link0_f1_bar2_size,
                                                                    link0_f1_bar3_size,
                                                                    link0_f1_bar4_size,
                                                                    link0_f1_bar5_size]
                                                                   )"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG0_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_def'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG1_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_def'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG2_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_def'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG3_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_def'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG4_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_def'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG5_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_def'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG0_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_idx'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG1_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_idx'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG2_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_idx'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG3_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_idx'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG4_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_idx'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG5_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_idx'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG0_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_sup'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG1_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_sup'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG2_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_sup'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG3_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_sup'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG4_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_sup'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_RBAR_CFG5_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f1_rbar_params['rbar_sup'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_INTERRUPT_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable Legacy Interrupt"
                    default             = "True"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Legacy Interrupt"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_INTERRUPT_PIN"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Interrupt Pin"
                    default             = "0"
                    options             = "[('INT A',0),('INT B',1),('INT C',2),('INT D',3)]"
                    editable            = "not MGMT_FTL_MF1_INTERRUPT_DISABLE"
                    hidden              = "MGMT_FTL_MF1_INTERRUPT_DISABLE"
                    group1              = "Legacy Interrupt"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_MSI_CAP_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable MSI Capability"
                    default             = "False"
                    value_expr          = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_MSI_CAP_MULT_MESSAGE_CAPABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Number of MSI vectors"
                    default             = "3"
                    options             = "[('1',0),('2',1),('4',2),('8',3),('16',4),('32',5)]"
                    editable            = "not MGMT_FTL_MF1_MSI_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF1_MSI_CAP_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_MSI_CAP_VEC_MASK_CAPABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Vector Masking"
                    default             = "True"
                    editable            = "not MGMT_FTL_MF1_MSI_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF1_MSI_CAP_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable MSI-X Capability"
                    default             = "True"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf1_msix_cap_table_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X Table Size"
                    default             = "8"
                    value_range         = "(1,2048)"
                    editable            = "not MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_MSIX_CAP_TABLE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "mgmt_ftl_mf1_msix_cap_table_size-1"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_MSIX_CAP_TABLE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_FTL_MF1_MSIX_CAP_TABLE_SIZE,'#013b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_MSIX_TABLE_BIR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X Table BAR indicator"
                    default             = "0"
                    options             = "gen_msix_bar_opts(link0_f1_bar0_enable,link0_f1_bar1_enable,link0_f1_bar2_enable,link0_f1_bar3_enable,link0_f1_bar4_enable,link0_f1_bar5_enable)"
                    value_expr          = "gen_msix_bar_opts(link0_f1_bar0_enable,link0_f1_bar1_enable,link0_f1_bar2_enable,link0_f1_bar3_enable,link0_f1_bar4_enable,link0_f1_bar5_enable)[0][1]"
                    drc                 = "(link0_f1_bar0_enable or link0_f1_bar1_enable or link0_f1_bar2_enable or link0_f1_bar3_enable or link0_f1_bar4_enable or link0_f1_bar5_enable)"
                    editable            = "not MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf1_msix_table_offset"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "MSI-X Table Address Offset (8bytes aligned)"
                    default             = "6000"
                    drc                 = "hex_value_drc(mgmt_ftl_mf1_msix_table_offset,8) and ((mgmt_ftl_mf1_msix_table_offset[-1] == '0') or (mgmt_ftl_mf1_msix_table_offset[-1] == '8'))"
                    editable            = "not MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_MSIX_TABLE_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('29\'h'+ ('%x' % (int(mgmt_ftl_mf1_msix_table_offset,16)//8))) if(hex_value_drc(mgmt_ftl_mf1_msix_table_offset,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_MSIX_TABLE_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF1_MSIX_TABLE_OFFSET[4:],16),'#031b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_MSIX_PBA_BIR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X PBA BAR indicator"
                    default             = "0"
                    options             = "gen_msix_bar_opts(link0_f1_bar0_enable,link0_f1_bar1_enable,link0_f1_bar2_enable,link0_f1_bar3_enable,link0_f1_bar4_enable,link0_f1_bar5_enable)"
                    value_expr          = "gen_msix_bar_opts(link0_f1_bar0_enable,link0_f1_bar1_enable,link0_f1_bar2_enable,link0_f1_bar3_enable,link0_f1_bar4_enable,link0_f1_bar5_enable)[0][1]"
                    drc                 = "(link0_f1_bar0_enable or link0_f1_bar1_enable or link0_f1_bar2_enable or link0_f1_bar3_enable or link0_f1_bar4_enable or link0_f1_bar5_enable)"
                    editable            = "not MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf1_msix_pba_offset"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "MSI-X PBA Address Offset (8bytes aligned)"
                    default             = "7000"
                    drc                 = "hex_value_drc(mgmt_ftl_mf1_msix_pba_offset,8) and ((mgmt_ftl_mf1_msix_pba_offset[-1] == '0') or (mgmt_ftl_mf1_msix_pba_offset[-1] == '8'))"
                    editable            = "not MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF1_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_MSIX_PBA_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('29\'h'+ ('%x' % (int(mgmt_ftl_mf1_msix_pba_offset,16)//8))) if(hex_value_drc(mgmt_ftl_mf1_msix_pba_offset,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_MSIX_PBA_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF1_MSIX_PBA_OFFSET[4:],16),'#031b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_DSN_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable DSN Capability"
                    default             = "False"
                    editable            = "not MGMT_FTL_MF1_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF1_FUNCTION_DISABLE"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf1_dsn_serial_number"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Serial Number"
                    default             = "0"
                    drc                 = "hex_value_drc(mgmt_ftl_mf1_dsn_serial_number,16)"
                    editable            = "MGMT_FTL_MF1_DSN_CAP_ENABLE"
                    hidden              = "not MGMT_FTL_MF1_DSN_CAP_ENABLE"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF1_DSN_SERIAL_NUMBER"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('64\'h'+ mgmt_ftl_mf1_dsn_serial_number)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_DSN_SERIAL_NUMBER_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(bitwise_and((int(mgmt_ftl_mf1_dsn_serial_number,16)//(2**32)),(0xFFFFFFFF)),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 1"
    />

    <lsccip:setting id                  = "FTL_MF1_DSN_SERIAL_NUMBER_L"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(bitwise_and(int(mgmt_ftl_mf1_dsn_serial_number,16),(0xFFFFFFFF)),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 1"
    />

    <!--Function 2-->
    <lsccip:setting id                  = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable Function 2"
                    default             = "True"
                    editable            = "((LINK0_NUM_FUNCTIONS-1)//2)"
                    value_expr          = "True if (LINK0_NUM_FUNCTIONS == 1 or LINK0_NUM_FUNCTIONS == 2) else False"
                    hidden              = "not ((LINK0_NUM_FUNCTIONS-1)//2)"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_ID1_DEVICE_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Device ID (16'h)"
                    default             = "9C1D"
                    drc                 = "hex_value_drc(in_FTL_MF2_ID1_DEVICE_ID,4)"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_ID1_DEVICE_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('16\'h'+ ('%s' % in_FTL_MF2_ID1_DEVICE_ID)) if(not MGMT_FTL_MF2_FUNCTION_DISABLE) else ('16\'h'+ ('%s' % 'FFFF'))"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_ID1_DEVICE_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF2_ID1_DEVICE_ID,16),'#018b') if(not MGMT_FTL_MF2_FUNCTION_DISABLE) else format(int('FFFF',16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_ID1_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Vendor ID (16'h)"
                    default             = "19AA"
                    drc                 = "hex_value_drc(in_FTL_MF2_ID1_VENDOR_ID,4)"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_ID1_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('16\'h'+ ('%s' % in_FTL_MF2_ID1_VENDOR_ID)) if(not MGMT_FTL_MF2_FUNCTION_DISABLE) else ('16\'h'+ ('%s' % 'FFFF'))"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_ID1_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF2_ID1_VENDOR_ID,16),'#018b') if(not MGMT_FTL_MF2_FUNCTION_DISABLE) else format(int('FFFF',16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_ID2_SUBSYSTEM_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem ID (16'h)"
                    default             = "E004"
                    drc                 = "hex_value_drc(in_FTL_MF2_ID2_SUBSYSTEM_ID,4)"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_ID2_SUBSYSTEM_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_MF2_ID2_SUBSYSTEM_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_ID2_SUBSYSTEM_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF2_ID2_SUBSYSTEM_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem Vendor ID (16'h)"
                    default             = "19AA"
                    drc                 = "hex_value_drc(in_FTL_MF2_ID2_SUBSYSTEM_VENDOR_ID,4)"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_MF2_ID2_SUBSYSTEM_VENDOR_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF2_ID2_SUBSYSTEM_VENDOR_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_ID3_CLASS_CODE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Class Code (24'h)"
                    default             = "118000"
                    drc                 = "hex_value_drc(in_FTL_MF2_ID3_CLASS_CODE,6)"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_ID3_CLASS_CODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'24\'h'+ ('%s' % in_FTL_MF2_ID3_CLASS_CODE)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_ID3_CLASS_CODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF2_ID3_CLASS_CODE,16),'#026b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_ID3_REVISION_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Revision ID (8'h)"
                    default             = "04"
                    drc                 = "hex_value_drc(in_FTL_MF2_ID3_REVISION_ID,2)"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_ID3_REVISION_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'8\'h'+ ('%s' % in_FTL_MF2_ID3_REVISION_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_ID3_REVISION_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF2_ID3_REVISION_ID,16),'#010b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CAP_ENABLE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Resizable BAR Capability"
                    default             = "False"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar0_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Enable"
                    default             = "False"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar0_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar0_enable"
                    hidden              = "not (MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar0_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f2_bar0_enable and not link0_f2_bar0_resize_en"
                    hidden              = "not link0_f2_bar0_enable or link0_f2_bar0_resize_en"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar0_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f2_bar0_enable and (not link0_f2_bar0_type)"
                    hidden              = "not (link0_f2_bar0_enable and (not link0_f2_bar0_type))"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar0_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f2_bar0_enable and (not link0_f2_bar0_type)"
                    hidden              = "not (link0_f2_bar0_enable and (not link0_f2_bar0_type))"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_RBAR_CFG0_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 0 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF2_RBAR_CFG0_SUPPORTED_SIZES,5,link0_f2_bar0_64b)"
                    editable            = "link0_f2_bar0_resize_en"
                    hidden              = "not link0_f2_bar0_resize_en"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar0_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (unit)"
                    default             = "0"
                    options             = "gen_bar_unit(link0_f2_bar0_type,link0_f2_bar0_64b,in_FTL_MF2_RBAR_CFG0_SUPPORTED_SIZES)"
                    value_expr          = "0 if(link0_f2_bar0_type) else (3 if(link0_f2_bar0_64b) else 1)"
                    editable            = "link0_f2_bar0_enable and (not link0_f2_bar0_type)"
                    hidden              = "not link0_f2_bar0_enable"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar0_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f2_bar0_type,link0_f2_bar0_64b,link0_f2_bar0_unit,in_FTL_MF2_RBAR_CFG0_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar0_enable"
                    hidden              = "not link0_f2_bar0_enable"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_BAR0_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ ('%08x' % ((calc_bar_size(link0_f2_bar0_enable,link0_f2_bar0_pref,link0_f2_bar0_64b,link0_f2_bar0_unit,link0_f2_bar0_size,0,link0_f2_bar0_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 0"
                    editable            = "0"
                    hidden              = "not (link0_f2_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_BAR0_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF2_BAR0_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar0_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 0"
                    editable            = "EN_DMA_SUPPORT and link0_f2_bar0_enable and (not link0_f2_bar0_type)"
                    hidden              = "not (EN_DMA_SUPPORT and link0_f2_bar0_enable and (not link0_f2_bar0_type))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f2_bar0_to_locadr,link0_f2_bar0_unit,link0_f2_bar0_size,link0_f2_bar0_64b,link0_f2_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "F2BAR0_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f2_bar0_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 0"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar1_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f2_bar0_enable and link0_f2_bar0_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    hidden              = "((link0_f2_bar0_enable and link0_f2_bar0_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar1_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar1_enable"
                    hidden              = "not (MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar1_enable)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar1_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f2_bar1_enable and not link0_f2_bar1_resize_en"
                    hidden              = "not link0_f2_bar1_enable or link0_f2_bar1_resize_en"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar1_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f2_bar1_enable and (not link0_f2_bar1_type)"
                    hidden              = "not (link0_f2_bar1_enable and (not link0_f2_bar1_type))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar1_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f2_bar1_enable and (not link0_f2_bar1_type)"
                    hidden              = "not (link0_f2_bar1_enable and (not link0_f2_bar1_type))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_RBAR_CFG1_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 1 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF2_RBAR_CFG1_SUPPORTED_SIZES,5,link0_f2_bar1_64b)"
                    editable            = "link0_f2_bar1_resize_en"
                    hidden              = "not link0_f2_bar1_resize_en"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar1_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f2_bar1_type) else (3 if(link0_f2_bar1_64b) else 1)"
                    options             = "gen_bar_unit(link0_f2_bar1_type,link0_f2_bar1_64b,in_FTL_MF2_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar1_enable and (not link0_f2_bar1_type)"
                    hidden              = "not link0_f2_bar1_enable"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar1_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f2_bar1_type,link0_f2_bar1_64b,link0_f2_bar1_unit,in_FTL_MF2_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar1_enable"
                    hidden              = "not link0_f2_bar1_enable"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_BAR1_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar0_enable,link0_f2_bar0_pref,link0_f2_bar0_64b,link0_f2_bar0_unit,link0_f2_bar0_size,1)))) if(link0_f2_bar0_enable and link0_f2_bar0_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar1_enable,link0_f2_bar1_pref,link0_f2_bar1_64b,link0_f2_bar1_unit,link0_f2_bar1_size,0,link0_f2_bar1_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 1"
                    editable            = "0"
                    hidden              = "not (link0_f2_bar1_enable or (link0_f2_bar0_enable and link0_f2_bar0_64b))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_BAR1_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF2_BAR1_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar1_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 1"
                    editable            = "EN_DMA_SUPPORT and ((link0_f2_bar1_enable and (not link0_f2_bar1_type)) or (link0_f2_bar0_enable and link0_f2_bar0_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f2_bar1_enable and (not link0_f2_bar1_type)) or (link0_f2_bar0_enable and link0_f2_bar0_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f2_bar1_to_locadr,link0_f2_bar0_unit,link0_f2_bar0_size,link0_f2_bar0_64b,link0_f2_bar0_enable,1) if(link0_f2_bar0_enable and link0_f2_bar0_64b) else loc_bar_drc(link0_f2_bar1_to_locadr,link0_f2_bar1_unit,link0_f2_bar1_size,link0_f2_bar1_64b,link0_f2_bar1_enable)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "F2BAR1_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f2_bar1_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 1"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar2_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f2_bar1_enable and link0_f2_bar1_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    hidden              = "((link0_f2_bar1_enable and link0_f2_bar1_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar2_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar2_enable"
                    hidden              = "not (MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar2_enable)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar2_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f2_bar2_enable and not link0_f2_bar2_resize_en"
                    hidden              = "not link0_f2_bar2_enable or link0_f2_bar2_resize_en"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar2_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f2_bar2_enable and (not link0_f2_bar2_type)"
                    hidden              = "not (link0_f2_bar2_enable and (not link0_f2_bar2_type))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar2_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f2_bar2_enable and (not link0_f2_bar2_type)"
                    hidden              = "not (link0_f2_bar2_enable and (not link0_f2_bar2_type))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_RBAR_CFG2_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 2 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF2_RBAR_CFG2_SUPPORTED_SIZES,5,link0_f2_bar2_64b)"
                    editable            = "link0_f2_bar2_resize_en"
                    hidden              = "not link0_f2_bar2_resize_en"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar2_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f2_bar2_type) else (3 if(link0_f2_bar2_64b) else 1)"
                    options             = "gen_bar_unit(link0_f2_bar2_type,link0_f2_bar2_64b,in_FTL_MF2_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar2_enable and (not link0_f2_bar2_type)"
                    hidden              = "not link0_f2_bar2_enable"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar2_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f2_bar2_type,link0_f2_bar2_64b,link0_f2_bar2_unit,in_FTL_MF2_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar2_enable"
                    hidden              = "not link0_f2_bar2_enable"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_BAR2_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar1_enable,link0_f2_bar1_pref,link0_f2_bar1_64b,link0_f2_bar1_unit,link0_f2_bar1_size,1)))) if(link0_f2_bar1_enable and link0_f2_bar1_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar2_enable,link0_f2_bar2_pref,link0_f2_bar2_64b,link0_f2_bar2_unit,link0_f2_bar2_size,0,link0_f2_bar2_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 2"
                    editable            = "0"
                    hidden              = "not (link0_f2_bar2_enable or (link0_f2_bar1_enable and link0_f2_bar1_64b))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_BAR2_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF2_BAR2_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar2_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 2"
                    editable            = "EN_DMA_SUPPORT and ((link0_f2_bar2_enable and (not link0_f2_bar2_type)) or (link0_f2_bar1_enable and link0_f2_bar1_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f2_bar2_enable and (not link0_f2_bar2_type)) or (link0_f2_bar1_enable and link0_f2_bar1_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f2_bar2_to_locadr,link0_f2_bar1_unit,link0_f2_bar1_size,link0_f2_bar1_64b,link0_f2_bar1_enable,1) if(link0_f2_bar1_enable and link0_f2_bar1_64b) else loc_bar_drc(link0_f2_bar2_to_locadr,link0_f2_bar2_unit,link0_f2_bar2_size,link0_f2_bar2_64b,link0_f2_bar2_enable)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "F2BAR2_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f2_bar2_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 2"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar3_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f2_bar2_enable and link0_f2_bar2_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    hidden              = "((link0_f2_bar2_enable and link0_f2_bar2_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar3_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar3_enable"
                    hidden              = "not (MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar3_enable)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar3_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f2_bar3_enable and not link0_f2_bar3_resize_en"
                    hidden              = "not link0_f2_bar3_enable or link0_f2_bar3_resize_en"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar3_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f2_bar3_enable and (not link0_f2_bar3_type)"
                    hidden              = "not (link0_f2_bar3_enable and (not link0_f2_bar3_type))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar3_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f2_bar3_enable and (not link0_f2_bar3_type)"
                    hidden              = "not (link0_f2_bar3_enable and (not link0_f2_bar3_type))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_RBAR_CFG3_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 3 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF2_RBAR_CFG3_SUPPORTED_SIZES,5,link0_f2_bar3_64b)"
                    editable            = "link0_f2_bar3_resize_en"
                    hidden              = "not link0_f2_bar3_resize_en"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar3_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f2_bar3_type) else (3 if(link0_f2_bar3_64b) else 1)"
                    options             = "gen_bar_unit(link0_f2_bar3_type,link0_f2_bar3_64b,in_FTL_MF2_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar3_enable and (not link0_f2_bar3_type)"
                    hidden              = "not link0_f2_bar3_enable"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar3_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f2_bar3_type,link0_f2_bar3_64b,link0_f2_bar3_unit,in_FTL_MF2_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar3_enable"
                    hidden              = "not link0_f2_bar3_enable"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_BAR3_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar2_enable,link0_f2_bar2_pref,link0_f2_bar2_64b,link0_f2_bar2_unit,link0_f2_bar2_size,1)))) if(link0_f2_bar2_enable and link0_f2_bar2_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar3_enable,link0_f2_bar3_pref,link0_f2_bar3_64b,link0_f2_bar3_unit,link0_f2_bar3_size,0,link0_f2_bar3_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 3"
                    editable            = "0"
                    hidden              = "not (link0_f2_bar3_enable or (link0_f2_bar2_enable and link0_f2_bar2_64b))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_BAR3_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF2_BAR3_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar3_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 3"
                    editable            = "EN_DMA_SUPPORT and ((link0_f2_bar3_enable and (not link0_f2_bar3_type)) or (link0_f2_bar2_enable and link0_f2_bar2_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f2_bar3_enable and (not link0_f2_bar3_type)) or (link0_f2_bar2_enable and link0_f2_bar2_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f2_bar3_to_locadr,link0_f2_bar2_unit,link0_f2_bar2_size,link0_f2_bar2_64b,link0_f2_bar2_enable,1) if(link0_f2_bar2_enable and link0_f2_bar2_64b) else loc_bar_drc(link0_f2_bar3_to_locadr,link0_f2_bar3_unit,link0_f2_bar3_size,link0_f2_bar3_64b,link0_f2_bar3_enable)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "F2BAR3_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f2_bar3_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 3"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar4_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f2_bar3_enable and link0_f2_bar3_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    hidden              = "((link0_f2_bar3_enable and link0_f2_bar3_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar4_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar4_enable"
                    hidden              = "not (MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar4_enable)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar4_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f2_bar4_enable and not link0_f2_bar4_resize_en"
                    hidden              = "not link0_f2_bar4_enable or link0_f2_bar4_resize_en"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar4_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f2_bar4_enable and (not link0_f2_bar4_type)"
                    hidden              = "not (link0_f2_bar4_enable and (not link0_f2_bar4_type))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar4_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f2_bar4_enable and (not link0_f2_bar4_type)"
                    hidden              = "not (link0_f2_bar4_enable and (not link0_f2_bar4_type))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_RBAR_CFG4_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 4 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF2_RBAR_CFG4_SUPPORTED_SIZES,5,link0_f2_bar4_64b)"
                    editable            = "link0_f2_bar4_resize_en"
                    hidden              = "not link0_f2_bar4_resize_en"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar4_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f2_bar4_type) else (3 if(link0_f2_bar4_64b) else 1)"
                    options             = "gen_bar_unit(link0_f2_bar4_type,link0_f2_bar4_64b,in_FTL_MF2_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar4_enable and (not link0_f2_bar4_type)"
                    hidden              = "not link0_f2_bar4_enable"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar4_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f2_bar4_type,link0_f2_bar4_64b,link0_f2_bar4_unit,in_FTL_MF2_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar4_enable"
                    hidden              = "not link0_f2_bar4_enable"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_BAR4_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar3_enable,link0_f2_bar3_pref,link0_f2_bar3_64b,link0_f2_bar3_unit,link0_f2_bar3_size,1)))) if(link0_f2_bar3_enable and link0_f2_bar3_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar4_enable,link0_f2_bar4_pref,link0_f2_bar4_64b,link0_f2_bar4_unit,link0_f2_bar4_size,0,link0_f2_bar4_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 4"
                    editable            = "0"
                    hidden              = "not (link0_f2_bar4_enable or (link0_f2_bar3_enable and link0_f2_bar3_64b))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_BAR4_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF2_BAR4_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar4_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 4"
                    editable            = "EN_DMA_SUPPORT and ((link0_f2_bar4_enable and (not link0_f2_bar4_type)) or (link0_f2_bar3_enable and link0_f2_bar3_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f2_bar4_enable and (not link0_f2_bar4_type)) or (link0_f2_bar3_enable and link0_f2_bar3_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f2_bar4_to_locadr,link0_f2_bar3_unit,link0_f2_bar3_size,link0_f2_bar3_64b,link0_f2_bar3_enable,1) if(link0_f2_bar3_enable and link0_f2_bar3_64b) else loc_bar_drc(link0_f2_bar4_to_locadr,link0_f2_bar4_unit,link0_f2_bar4_size,link0_f2_bar4_64b,link0_f2_bar4_enable)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "F2BAR4_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f2_bar4_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 4"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar5_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f2_bar4_enable and link0_f2_bar4_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    hidden              = "((link0_f2_bar4_enable and link0_f2_bar4_64b) or MGMT_FTL_MF2_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar5_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar5_enable"
                    hidden              = "not (MGMT_FTL_MF2_RBAR_CAP_ENABLE and link0_f2_bar5_enable)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar5_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f2_bar5_enable and not link0_f2_bar5_resize_en"
                    hidden              = "not link0_f2_bar5_enable or link0_f2_bar5_resize_en"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar5_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : 64 bit address"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (0)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar5_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f2_bar5_enable and (not link0_f2_bar5_type)"
                    hidden              = "not (link0_f2_bar5_enable and (not link0_f2_bar5_type))"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "in_FTL_MF2_RBAR_CFG5_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 5 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF2_RBAR_CFG5_SUPPORTED_SIZES,5,link0_f2_bar5_64b)"
                    editable            = "link0_f2_bar5_resize_en"
                    hidden              = "not link0_f2_bar5_resize_en"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar5_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f2_bar5_type) else (3 if(link0_f2_bar5_64b) else 1)"
                    options             = "gen_bar_unit(link0_f2_bar5_type,link0_f2_bar5_64b,in_FTL_MF2_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar5_enable and (not link0_f2_bar5_type)"
                    hidden              = "not link0_f2_bar5_enable"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar5_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f2_bar5_type,link0_f2_bar5_64b,link0_f2_bar5_unit,in_FTL_MF2_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "link0_f2_bar5_enable"
                    hidden              = "not link0_f2_bar5_enable"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_BAR5_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar4_enable,link0_f2_bar4_pref,link0_f2_bar4_64b,link0_f2_bar4_unit,link0_f2_bar4_size,1)))) if(link0_f2_bar4_enable and link0_f2_bar4_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f2_bar5_enable,link0_f2_bar5_pref,link0_f2_bar5_64b,link0_f2_bar5_unit,link0_f2_bar5_size,0,link0_f2_bar0_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 5"
                    editable            = "0"
                    hidden              = "not (link0_f2_bar5_enable or (link0_f2_bar4_enable and link0_f2_bar4_64b))"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_BAR5_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF2_BAR5_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_bar5_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 5"
                    editable            = "EN_DMA_SUPPORT and ((link0_f2_bar5_enable and (not link0_f2_bar5_type)) or (link0_f2_bar4_enable and link0_f2_bar4_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f2_bar5_enable and (not link0_f2_bar5_type)) or (link0_f2_bar4_enable and link0_f2_bar4_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f2_bar5_to_locadr,link0_f2_bar4_unit,link0_f2_bar4_size,link0_f2_bar4_64b,link0_f2_bar4_enable,1) if(link0_f2_bar4_enable and link0_f2_bar4_64b) else loc_bar_drc(link0_f2_bar5_to_locadr,link0_f2_bar5_unit,link0_f2_bar5_size,link0_f2_bar5_64b,link0_f2_bar5_enable)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "F2BAR5_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f2_bar5_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 5"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "link0_f2_rbar_params"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "calc_actual_rbar_params(MGMT_FTL_MF2_RBAR_CAP_ENABLE,
                                                                   [link0_f2_bar0_resize_en,
                                                                    link0_f2_bar1_resize_en,
                                                                    link0_f2_bar2_resize_en,
                                                                    link0_f2_bar3_resize_en,
                                                                    link0_f2_bar4_resize_en,
                                                                    link0_f2_bar5_resize_en],
                                                                   [in_FTL_MF2_RBAR_CFG0_SUPPORTED_SIZES,
                                                                    in_FTL_MF2_RBAR_CFG1_SUPPORTED_SIZES,
                                                                    in_FTL_MF2_RBAR_CFG2_SUPPORTED_SIZES,
                                                                    in_FTL_MF2_RBAR_CFG3_SUPPORTED_SIZES,
                                                                    in_FTL_MF2_RBAR_CFG4_SUPPORTED_SIZES,
                                                                    in_FTL_MF2_RBAR_CFG5_SUPPORTED_SIZES],
                                                                   [link0_f2_bar0_unit,
                                                                    link0_f2_bar1_unit,
                                                                    link0_f2_bar2_unit,
                                                                    link0_f2_bar3_unit,
                                                                    link0_f2_bar4_unit,
                                                                    link0_f2_bar5_unit],
                                                                   [link0_f2_bar0_size,
                                                                    link0_f2_bar1_size,
                                                                    link0_f2_bar2_size,
                                                                    link0_f2_bar3_size,
                                                                    link0_f2_bar4_size,
                                                                    link0_f2_bar5_size]
                                                                   )"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG0_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_def'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG1_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_def'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG2_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_def'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG3_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_def'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG4_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_def'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG5_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_def'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG0_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_idx'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG1_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_idx'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG2_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_idx'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG3_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_idx'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG4_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_idx'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG5_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_idx'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG0_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_sup'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG1_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_sup'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG2_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_sup'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG3_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_sup'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG4_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_sup'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_RBAR_CFG5_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f2_rbar_params['rbar_sup'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_INTERRUPT_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable Legacy Interrupt"
                    default             = "True"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Legacy Interrupt"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_INTERRUPT_PIN"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Interrupt Pin"
                    default             = "0"
                    options             = "[('INT A',0),('INT B',1),('INT C',2),('INT D',3)]"
                    editable            = "not MGMT_FTL_MF2_INTERRUPT_DISABLE"
                    hidden              = "MGMT_FTL_MF2_INTERRUPT_DISABLE"
                    group1              = "Legacy Interrupt"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_MSI_CAP_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable MSI Capability"
                    default             = "False"
                    value_expr          = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_MSI_CAP_MULT_MESSAGE_CAPABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Number of MSI vectors"
                    default             = "3"
                    options             = "[('1',0),('2',1),('4',2),('8',3),('16',4),('32',5)]"
                    editable            = "not MGMT_FTL_MF2_MSI_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF2_MSI_CAP_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_MSI_CAP_VEC_MASK_CAPABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Vector Masking"
                    default             = "True"
                    editable            = "not MGMT_FTL_MF2_MSI_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF2_MSI_CAP_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable MSI-X Capability"
                    default             = "True"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf2_msix_cap_table_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X Table Size"
                    default             = "8"
                    value_range         = "(1,2048)"
                    editable            = "not MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_MSIX_CAP_TABLE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "mgmt_ftl_mf2_msix_cap_table_size-1"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_MSIX_CAP_TABLE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_FTL_MF2_MSIX_CAP_TABLE_SIZE,'#013b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_MSIX_TABLE_BIR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X Table BAR indicator"
                    default             = "0"
                    options             = "gen_msix_bar_opts(link0_f2_bar0_enable,link0_f2_bar1_enable,link0_f2_bar2_enable,link0_f2_bar3_enable,link0_f2_bar4_enable,link0_f2_bar5_enable)"
                    value_expr          = "gen_msix_bar_opts(link0_f2_bar0_enable,link0_f2_bar1_enable,link0_f2_bar2_enable,link0_f2_bar3_enable,link0_f2_bar4_enable,link0_f2_bar5_enable)[0][1]"
                    drc                 = "(link0_f2_bar0_enable or link0_f2_bar1_enable or link0_f2_bar2_enable or link0_f2_bar3_enable or link0_f2_bar4_enable or link0_f2_bar5_enable)"
                    editable            = "not MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf2_msix_table_offset"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "MSI-X Table Address Offset (8bytes aligned)"
                    default             = "6000"
                    drc                 = "hex_value_drc(mgmt_ftl_mf2_msix_table_offset,8) and ((mgmt_ftl_mf2_msix_table_offset[-1] == '0') or (mgmt_ftl_mf2_msix_table_offset[-1] == '8'))"
                    editable            = "not MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_MSIX_TABLE_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('29\'h'+ ('%x' % (int(mgmt_ftl_mf2_msix_table_offset,16)//8))) if(hex_value_drc(mgmt_ftl_mf2_msix_table_offset,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_MSIX_TABLE_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF2_MSIX_TABLE_OFFSET[4:],16),'#031b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_MSIX_PBA_BIR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X PBA BAR indicator"
                    default             = "0"
                    options             = "gen_msix_bar_opts(link0_f2_bar0_enable,link0_f2_bar1_enable,link0_f2_bar2_enable,link0_f2_bar3_enable,link0_f2_bar4_enable,link0_f2_bar5_enable)"
                    value_expr          = "gen_msix_bar_opts(link0_f2_bar0_enable,link0_f2_bar1_enable,link0_f2_bar2_enable,link0_f2_bar3_enable,link0_f2_bar4_enable,link0_f2_bar5_enable)[0][1]"
                    drc                 = "(link0_f2_bar0_enable or link0_f2_bar1_enable or link0_f2_bar2_enable or link0_f2_bar3_enable or link0_f2_bar4_enable or link0_f2_bar5_enable)"
                    editable            = "not MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf2_msix_pba_offset"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "MSI-X PBA Address Offset (8bytes aligned)"
                    default             = "7000"
                    drc                 = "hex_value_drc(mgmt_ftl_mf2_msix_pba_offset,8) and ((mgmt_ftl_mf2_msix_pba_offset[-1] == '0') or (mgmt_ftl_mf2_msix_pba_offset[-1] == '8'))"
                    editable            = "not MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF2_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_MSIX_PBA_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('29\'h'+ ('%x' % (int(mgmt_ftl_mf2_msix_pba_offset,16)//8))) if(hex_value_drc(mgmt_ftl_mf2_msix_pba_offset,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_MSIX_PBA_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF2_MSIX_PBA_OFFSET[4:],16),'#031b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_DSN_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable DSN Capability"
                    default             = "False"
                    editable            = "not MGMT_FTL_MF2_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF2_FUNCTION_DISABLE"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf2_dsn_serial_number"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Serial Number"
                    default             = "0"
                    drc                 = "hex_value_drc(mgmt_ftl_mf2_dsn_serial_number,16)"
                    editable            = "MGMT_FTL_MF2_DSN_CAP_ENABLE"
                    hidden              = "not MGMT_FTL_MF2_DSN_CAP_ENABLE"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF2_DSN_SERIAL_NUMBER"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('64\'h'+ mgmt_ftl_mf2_dsn_serial_number)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_DSN_SERIAL_NUMBER_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(bitwise_and((int(MGMT_FTL_MF2_DSN_SERIAL_NUMBER[4:],16)//(2**32)),(0xFFFFFFFF)),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 2"
    />

    <lsccip:setting id                  = "FTL_MF2_DSN_SERIAL_NUMBER_L"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(bitwise_and(int(MGMT_FTL_MF2_DSN_SERIAL_NUMBER[4:],16),(0xFFFFFFFF)),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 2"
    />

    <!--Function 3-->
    <lsccip:setting id                  = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable Function 3"
                    default             = "True"
                    editable            = "((LINK0_NUM_FUNCTIONS-1)//3)"
                    value_expr          = "True if (LINK0_NUM_FUNCTIONS == 1 or LINK0_NUM_FUNCTIONS == 2 or LINK0_NUM_FUNCTIONS == 3) else False"
                    hidden              = "not ((LINK0_NUM_FUNCTIONS-1)//3)"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_ID1_DEVICE_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Device ID (16'h)"
                    default             = "9C1D"
                    drc                 = "hex_value_drc(in_FTL_MF3_ID1_DEVICE_ID,4)"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_ID1_DEVICE_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('16\'h'+ ('%s' % in_FTL_MF3_ID1_DEVICE_ID)) if(not MGMT_FTL_MF3_FUNCTION_DISABLE) else ('16\'h'+ ('%s' % 'FFFF'))"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_ID1_DEVICE_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF3_ID1_DEVICE_ID,16),'#018b') if(not MGMT_FTL_MF3_FUNCTION_DISABLE) else format(int('FFFF',16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_ID1_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Vendor ID (16'h)"
                    default             = "19AA"
                    drc                 = "hex_value_drc(in_FTL_MF3_ID1_VENDOR_ID,4)"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_ID1_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('16\'h'+ ('%s' % in_FTL_MF3_ID1_VENDOR_ID)) if(not MGMT_FTL_MF3_FUNCTION_DISABLE) else ('16\'h'+ ('%s' % 'FFFF'))"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_ID1_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF3_ID1_VENDOR_ID,16),'#018b') if(not MGMT_FTL_MF3_FUNCTION_DISABLE) else format(int('FFFF',16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_ID2_SUBSYSTEM_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem ID (16'h)"
                    default             = "E004"
                    drc                 = "hex_value_drc(in_FTL_MF3_ID2_SUBSYSTEM_ID,4)"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_ID2_SUBSYSTEM_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_MF3_ID2_SUBSYSTEM_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_ID2_SUBSYSTEM_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF3_ID2_SUBSYSTEM_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Subsystem Vendor ID (16'h)"
                    default             = "19AA"
                    drc                 = "hex_value_drc(in_FTL_MF3_ID2_SUBSYSTEM_VENDOR_ID,4)"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'16\'h'+ ('%s' % in_FTL_MF3_ID2_SUBSYSTEM_VENDOR_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_ID2_SUBSYSTEM_VENDOR_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF3_ID2_SUBSYSTEM_VENDOR_ID,16),'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_ID3_CLASS_CODE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Class Code (24'h)"
                    default             = "118000"
                    drc                 = "hex_value_drc(in_FTL_MF3_ID3_CLASS_CODE,6)"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_ID3_CLASS_CODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'24\'h'+ ('%s' % in_FTL_MF3_ID3_CLASS_CODE)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_ID3_CLASS_CODE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF3_ID3_CLASS_CODE,16),'#026b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_ID3_REVISION_ID"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Revision ID (8'h)"
                    default             = "04"
                    drc                 = "hex_value_drc(in_FTL_MF3_ID3_REVISION_ID,2)"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_ID3_REVISION_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'8\'h'+ ('%s' % in_FTL_MF3_ID3_REVISION_ID)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_ID3_REVISION_ID"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(in_FTL_MF3_ID3_REVISION_ID,16),'#010b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Configuration"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CAP_ENABLE"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Resizable BAR Capability"
                    default             = "False"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar0_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Enable"
                    default             = "False"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar0_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar0_enable"
                    hidden              = "not (MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar0_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f3_bar0_enable and not link0_f3_bar0_resize_en"
                    hidden              = "not link0_f3_bar0_enable or link0_f3_bar0_resize_en"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar0_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f3_bar0_enable and (not link0_f3_bar0_type)"
                    hidden              = "not (link0_f3_bar0_enable and (not link0_f3_bar0_type))"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar0_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 0 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f3_bar0_enable and (not link0_f3_bar0_type)"
                    hidden              = "not (link0_f3_bar0_enable and (not link0_f3_bar0_type))"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_RBAR_CFG0_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 0 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF3_RBAR_CFG0_SUPPORTED_SIZES,5,link0_f3_bar0_64b)"
                    editable            = "link0_f3_bar0_resize_en"
                    hidden              = "not link0_f3_bar0_resize_en"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar0_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (unit)"
                    default             = "0"
                    options             = "gen_bar_unit(link0_f3_bar0_type,link0_f3_bar0_64b,in_FTL_MF3_RBAR_CFG0_SUPPORTED_SIZES)"
                    value_expr          = "0 if(link0_f3_bar0_type) else (3 if(link0_f3_bar0_64b) else 1)"
                    editable            = "link0_f3_bar0_enable and (not link0_f3_bar0_type)"
                    hidden              = "not link0_f3_bar0_enable"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar0_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 0 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f3_bar0_type,link0_f3_bar0_64b,link0_f3_bar0_unit,in_FTL_MF3_RBAR_CFG0_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar0_enable"
                    hidden              = "not link0_f3_bar0_enable"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_BAR0_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ ('%08x' % ((calc_bar_size(link0_f3_bar0_enable,link0_f3_bar0_pref,link0_f3_bar0_64b,link0_f3_bar0_unit,link0_f3_bar0_size,0,link0_f3_bar0_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 0"
                    editable            = "0"
                    hidden              = "not (link0_f3_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_BAR0_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF3_BAR0_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar0_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 0"
                    editable            = "EN_DMA_SUPPORT and link0_f3_bar0_enable and (not link0_f3_bar0_type)"
                    hidden              = "not (EN_DMA_SUPPORT and link0_f3_bar0_enable and (not link0_f3_bar0_type))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f3_bar0_to_locadr,link0_f3_bar0_unit,link0_f3_bar0_size,link0_f3_bar0_64b,link0_f3_bar0_enable)"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "F3BAR0_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f3_bar0_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 0"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar1_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f3_bar0_enable and link0_f3_bar0_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    hidden              = "((link0_f3_bar0_enable and link0_f3_bar0_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar1_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar1_enable"
                    hidden              = "not (MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar1_enable)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar1_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f3_bar1_enable and not link0_f3_bar1_resize_en"
                    hidden              = "not link0_f3_bar1_enable or link0_f3_bar1_resize_en"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar1_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f3_bar1_enable and (not link0_f3_bar1_type)"
                    hidden              = "not (link0_f3_bar1_enable and (not link0_f3_bar1_type))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar1_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 1 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f3_bar1_enable and (not link0_f3_bar1_type)"
                    hidden              = "not (link0_f3_bar1_enable and (not link0_f3_bar1_type))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_RBAR_CFG1_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 1 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF3_RBAR_CFG1_SUPPORTED_SIZES,5,link0_f3_bar1_64b)"
                    editable            = "link0_f3_bar1_resize_en"
                    hidden              = "not link0_f3_bar1_resize_en"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar1_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f3_bar1_type) else (3 if(link0_f3_bar1_64b) else 1)"
                    options             = "gen_bar_unit(link0_f3_bar1_type,link0_f3_bar1_64b,in_FTL_MF3_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar1_enable and (not link0_f3_bar1_type)"
                    hidden              = "not link0_f3_bar1_enable"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar1_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 1 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f3_bar1_type,link0_f3_bar1_64b,link0_f3_bar1_unit,in_FTL_MF3_RBAR_CFG1_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar1_enable"
                    hidden              = "not link0_f3_bar1_enable"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_BAR1_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar0_enable,link0_f3_bar0_pref,link0_f3_bar0_64b,link0_f3_bar0_unit,link0_f3_bar0_size,1)))) if(link0_f3_bar0_enable and link0_f3_bar0_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar1_enable,link0_f3_bar1_pref,link0_f3_bar1_64b,link0_f3_bar1_unit,link0_f3_bar1_size,0,link0_f3_bar1_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 1"
                    editable            = "0"
                    hidden              = "not (link0_f3_bar1_enable or (link0_f3_bar0_enable and link0_f3_bar0_64b))"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_BAR1_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF3_BAR1_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar1_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 1"
                    editable            = "EN_DMA_SUPPORT and ((link0_f3_bar1_enable and (not link0_f3_bar1_type)) or (link0_f3_bar0_enable and link0_f3_bar0_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f3_bar1_enable and (not link0_f3_bar1_type)) or (link0_f3_bar0_enable and link0_f3_bar0_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f3_bar1_to_locadr,link0_f3_bar0_unit,link0_f3_bar0_size,link0_f3_bar0_64b,link0_f3_bar0_enable,1) if(link0_f3_bar0_enable and link0_f3_bar0_64b) else loc_bar_drc(link0_f3_bar1_to_locadr,link0_f3_bar1_unit,link0_f3_bar1_size,link0_f3_bar1_64b,link0_f3_bar1_enable)"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "F3BAR1_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f3_bar1_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 1"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar2_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f3_bar1_enable and link0_f3_bar1_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    hidden              = "((link0_f3_bar1_enable and link0_f3_bar1_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar2_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar2_enable"
                    hidden              = "not (MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar2_enable)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar2_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f3_bar2_enable and not link0_f3_bar2_resize_en"
                    hidden              = "not link0_f3_bar2_enable or link0_f3_bar2_resize_en"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar2_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f3_bar2_enable and (not link0_f3_bar2_type)"
                    hidden              = "not (link0_f3_bar2_enable and (not link0_f3_bar2_type))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar2_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 2 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f3_bar2_enable and (not link0_f3_bar2_type)"
                    hidden              = "not (link0_f3_bar2_enable and (not link0_f3_bar2_type))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_RBAR_CFG2_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 2 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF3_RBAR_CFG2_SUPPORTED_SIZES,5,link0_f3_bar2_64b)"
                    editable            = "link0_f3_bar2_resize_en"
                    hidden              = "not link0_f3_bar2_resize_en"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar2_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f3_bar2_type) else (3 if(link0_f3_bar2_64b) else 1)"
                    options             = "gen_bar_unit(link0_f3_bar2_type,link0_f3_bar2_64b,in_FTL_MF3_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar2_enable and (not link0_f3_bar2_type)"
                    hidden              = "not link0_f3_bar2_enable"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar2_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 2 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f3_bar2_type,link0_f3_bar2_64b,link0_f3_bar2_unit,in_FTL_MF3_RBAR_CFG2_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar2_enable"
                    hidden              = "not link0_f3_bar2_enable"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_BAR2_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar1_enable,link0_f3_bar1_pref,link0_f3_bar1_64b,link0_f3_bar1_unit,link0_f3_bar1_size,1)))) if(link0_f3_bar1_enable and link0_f3_bar1_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar2_enable,link0_f3_bar2_pref,link0_f3_bar2_64b,link0_f3_bar2_unit,link0_f3_bar2_size,0,link0_f3_bar2_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 2"
                    editable            = "0"
                    hidden              = "not (link0_f3_bar2_enable or (link0_f3_bar1_enable and link0_f3_bar1_64b))"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_BAR2_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF3_BAR2_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar2_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 2"
                    editable            = "EN_DMA_SUPPORT and ((link0_f3_bar2_enable and (not link0_f3_bar2_type)) or (link0_f3_bar1_enable and link0_f3_bar1_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f3_bar2_enable and (not link0_f3_bar2_type)) or (link0_f3_bar1_enable and link0_f3_bar1_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f3_bar2_to_locadr,link0_f3_bar1_unit,link0_f3_bar1_size,link0_f3_bar1_64b,link0_f3_bar1_enable,1) if(link0_f3_bar1_enable and link0_f3_bar1_64b) else loc_bar_drc(link0_f3_bar2_to_locadr,link0_f3_bar2_unit,link0_f3_bar2_size,link0_f3_bar2_64b,link0_f3_bar2_enable)"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "F3BAR2_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f3_bar2_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 2"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar3_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f3_bar2_enable and link0_f3_bar2_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    hidden              = "((link0_f3_bar2_enable and link0_f3_bar2_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar3_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar3_enable"
                    hidden              = "not (MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar3_enable)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar3_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f3_bar3_enable and not link0_f3_bar3_resize_en"
                    hidden              = "not link0_f3_bar3_enable or link0_f3_bar3_resize_en"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar3_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f3_bar3_enable and (not link0_f3_bar3_type)"
                    hidden              = "not (link0_f3_bar3_enable and (not link0_f3_bar3_type))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar3_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 3 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f3_bar3_enable and (not link0_f3_bar3_type)"
                    hidden              = "not (link0_f3_bar3_enable and (not link0_f3_bar3_type))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_RBAR_CFG3_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 3 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF3_RBAR_CFG3_SUPPORTED_SIZES,5,link0_f3_bar3_64b)"
                    editable            = "link0_f3_bar3_resize_en"
                    hidden              = "not link0_f3_bar3_resize_en"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar3_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f3_bar3_type) else (3 if(link0_f3_bar3_64b) else 1)"
                    options             = "gen_bar_unit(link0_f3_bar3_type,link0_f3_bar3_64b,in_FTL_MF3_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar3_enable and (not link0_f3_bar3_type)"
                    hidden              = "not link0_f3_bar3_enable"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar3_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 3 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f3_bar3_type,link0_f3_bar3_64b,link0_f3_bar3_unit,in_FTL_MF3_RBAR_CFG3_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar3_enable"
                    hidden              = "not link0_f3_bar3_enable"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_BAR3_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar2_enable,link0_f3_bar2_pref,link0_f3_bar2_64b,link0_f3_bar2_unit,link0_f3_bar2_size,1)))) if(link0_f3_bar2_enable and link0_f3_bar2_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar3_enable,link0_f3_bar3_pref,link0_f3_bar3_64b,link0_f3_bar3_unit,link0_f3_bar3_size,0,link0_f3_bar3_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 3"
                    editable            = "0"
                    hidden              = "not (link0_f3_bar3_enable or (link0_f3_bar2_enable and link0_f3_bar2_64b))"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_BAR3_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF3_BAR3_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar3_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 3"
                    editable            = "EN_DMA_SUPPORT and ((link0_f3_bar3_enable and (not link0_f3_bar3_type)) or (link0_f3_bar2_enable and link0_f3_bar2_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f3_bar3_enable and (not link0_f3_bar3_type)) or (link0_f3_bar2_enable and link0_f3_bar2_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f3_bar3_to_locadr,link0_f3_bar2_unit,link0_f3_bar2_size,link0_f3_bar2_64b,link0_f3_bar2_enable,1) if(link0_f3_bar2_enable and link0_f3_bar2_64b) else loc_bar_drc(link0_f3_bar3_to_locadr,link0_f3_bar3_unit,link0_f3_bar3_size,link0_f3_bar3_64b,link0_f3_bar3_enable)"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "F3BAR3_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f3_bar3_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 3"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar4_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f3_bar3_enable and link0_f3_bar3_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    hidden              = "((link0_f3_bar3_enable and link0_f3_bar3_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar4_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar4_enable"
                    hidden              = "not (MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar4_enable)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar4_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f3_bar4_enable and not link0_f3_bar4_resize_en"
                    hidden              = "not link0_f3_bar4_enable or link0_f3_bar4_resize_en"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar4_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : 64 bit address"
                    default             = "False"
                    editable            = "link0_f3_bar4_enable and (not link0_f3_bar4_type)"
                    hidden              = "not (link0_f3_bar4_enable and (not link0_f3_bar4_type))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar4_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 4 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f3_bar4_enable and (not link0_f3_bar4_type)"
                    hidden              = "not (link0_f3_bar4_enable and (not link0_f3_bar4_type))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_RBAR_CFG4_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 4 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF3_RBAR_CFG4_SUPPORTED_SIZES,5,link0_f3_bar4_64b)"
                    editable            = "link0_f3_bar4_resize_en"
                    hidden              = "not link0_f3_bar4_resize_en"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar4_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f3_bar4_type) else (3 if(link0_f3_bar4_64b) else 1)"
                    options             = "gen_bar_unit(link0_f3_bar4_type,link0_f3_bar4_64b,in_FTL_MF3_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar4_enable and (not link0_f3_bar4_type)"
                    hidden              = "not link0_f3_bar4_enable"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar4_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 4 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f3_bar4_type,link0_f3_bar4_64b,link0_f3_bar4_unit,in_FTL_MF3_RBAR_CFG4_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar4_enable"
                    hidden              = "not link0_f3_bar4_enable"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_BAR4_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar3_enable,link0_f3_bar3_pref,link0_f3_bar3_64b,link0_f3_bar3_unit,link0_f3_bar3_size,1)))) if(link0_f3_bar3_enable and link0_f3_bar3_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar4_enable,link0_f3_bar4_pref,link0_f3_bar4_64b,link0_f3_bar4_unit,link0_f3_bar4_size,0,link0_f3_bar4_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 4"
                    editable            = "0"
                    hidden              = "not (link0_f3_bar4_enable or (link0_f3_bar3_enable and link0_f3_bar3_64b))"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_BAR4_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF3_BAR4_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar4_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 4"
                    editable            = "EN_DMA_SUPPORT and ((link0_f3_bar4_enable and (not link0_f3_bar4_type)) or (link0_f3_bar3_enable and link0_f3_bar3_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f3_bar4_enable and (not link0_f3_bar4_type)) or (link0_f3_bar3_enable and link0_f3_bar3_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f3_bar4_to_locadr,link0_f3_bar3_unit,link0_f3_bar3_size,link0_f3_bar3_64b,link0_f3_bar3_enable,1) if(link0_f3_bar3_enable and link0_f3_bar3_64b) else loc_bar_drc(link0_f3_bar4_to_locadr,link0_f3_bar4_unit,link0_f3_bar4_size,link0_f3_bar4_64b,link0_f3_bar4_enable)"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "F3BAR4_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f3_bar4_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 4"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar5_enable"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Enable"
                    default             = "False"
                    editable            = "not ((link0_f3_bar4_enable and link0_f3_bar4_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    hidden              = "((link0_f3_bar4_enable and link0_f3_bar4_64b) or MGMT_FTL_MF3_FUNCTION_DISABLE)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar5_resize_en"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Resizable"
                    default             = "False"
                    editable            = "MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar5_enable"
                    hidden              = "not (MGMT_FTL_MF3_RBAR_CAP_ENABLE and link0_f3_bar5_enable)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar5_type"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Address Type"
                    options             = "[('Memory',0), ('IO', 1)]"
                    default             = "0"
                    editable            = "link0_f3_bar5_enable and not link0_f3_bar5_resize_en"
                    hidden              = "not link0_f3_bar5_enable or link0_f3_bar5_resize_en"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar5_64b"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : 64 bit address"
                    default             = "False"
                    editable            = "0"
                    hidden              = "not (0)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar5_pref"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "BAR 5 : Prefetchable"
                    default             = "False"
                    editable            = "link0_f3_bar5_enable and (not link0_f3_bar5_type)"
                    hidden              = "not (link0_f3_bar5_enable and (not link0_f3_bar5_type))"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "in_FTL_MF3_RBAR_CFG5_SUPPORTED_SIZES"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "BAR 5 : Resizable BAR Supported Sizes [23:4] (20'h)"
                    description         = "Each bit indicates a supported size which is 2^(i+16) Bytes, where i is the index from [23:4].
                                           For example, if bit[4] == 1, then 2^(4+16) Bytes = 1 MB."
                    default             = "00000"
                    drc                 = "rbar_size_drc(in_FTL_MF3_RBAR_CFG5_SUPPORTED_SIZES,5,link0_f3_bar5_64b)"
                    editable            = "link0_f3_bar5_resize_en"
                    hidden              = "not link0_f3_bar5_resize_en"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar5_unit"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (unit)"
                    default             = "0"
                    value_expr          = "0 if(link0_f3_bar5_type) else (3 if(link0_f3_bar5_64b) else 1)"
                    options             = "gen_bar_unit(link0_f3_bar5_type,link0_f3_bar5_64b,in_FTL_MF3_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar5_enable and (not link0_f3_bar5_type)"
                    hidden              = "not link0_f3_bar5_enable"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar5_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "BAR 5 : Default Size (value)"
                    default             = "64"
                    options             = "gen_bar_size(link0_f3_bar5_type,link0_f3_bar5_64b,link0_f3_bar5_unit,in_FTL_MF3_RBAR_CFG5_SUPPORTED_SIZES)"
                    editable            = "link0_f3_bar5_enable"
                    hidden              = "not link0_f3_bar5_enable"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_BAR5_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar4_enable,link0_f3_bar4_pref,link0_f3_bar4_64b,link0_f3_bar4_unit,link0_f3_bar4_size,1)))) if(link0_f3_bar4_enable and link0_f3_bar4_64b) else ('32\'h'+ ('%08x' % (calc_bar_size(link0_f3_bar5_enable,link0_f3_bar5_pref,link0_f3_bar5_64b,link0_f3_bar5_unit,link0_f3_bar5_size,0,link0_f3_bar5_type))))"
                    output_formatter    = "nostr"
                    title               = "BAR 5"
                    editable            = "0"
                    hidden              = "not (link0_f3_bar5_enable or (link0_f3_bar4_enable and link0_f3_bar4_64b))"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_BAR5_CFG"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF3_BAR5_CFG[4:],16),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_bar5_to_locadr"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Local Memory Base Address 5"
                    editable            = "EN_DMA_SUPPORT and ((link0_f3_bar5_enable and (not link0_f3_bar5_type)) or (link0_f3_bar4_enable and link0_f3_bar4_64b))"
                    hidden              = "not (EN_DMA_SUPPORT and ((link0_f3_bar5_enable and (not link0_f3_bar5_type)) or (link0_f3_bar4_enable and link0_f3_bar4_64b)))"
                    default             = "0"
                    drc                 = "loc_bar_drc(link0_f3_bar5_to_locadr,link0_f3_bar4_unit,link0_f3_bar4_size,link0_f3_bar4_64b,link0_f3_bar4_enable,1) if(link0_f3_bar4_enable and link0_f3_bar4_64b) else loc_bar_drc(link0_f3_bar5_to_locadr,link0_f3_bar5_unit,link0_f3_bar5_size,link0_f3_bar5_64b,link0_f3_bar5_enable)"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "F3BAR5_TO_LOCADR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "'32\'h'+ link0_f3_bar5_to_locadr"
                    output_formatter    = "nostr"
                    title               = "Local BAR"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Base Address Register 5"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "link0_f3_rbar_params"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "calc_actual_rbar_params(MGMT_FTL_MF3_RBAR_CAP_ENABLE,
                                                                   [link0_f3_bar0_resize_en,
                                                                    link0_f3_bar1_resize_en,
                                                                    link0_f3_bar2_resize_en,
                                                                    link0_f3_bar3_resize_en,
                                                                    link0_f3_bar4_resize_en,
                                                                    link0_f3_bar5_resize_en],
                                                                   [in_FTL_MF3_RBAR_CFG0_SUPPORTED_SIZES,
                                                                    in_FTL_MF3_RBAR_CFG1_SUPPORTED_SIZES,
                                                                    in_FTL_MF3_RBAR_CFG2_SUPPORTED_SIZES,
                                                                    in_FTL_MF3_RBAR_CFG3_SUPPORTED_SIZES,
                                                                    in_FTL_MF3_RBAR_CFG4_SUPPORTED_SIZES,
                                                                    in_FTL_MF3_RBAR_CFG5_SUPPORTED_SIZES],
                                                                   [link0_f3_bar0_unit,
                                                                    link0_f3_bar1_unit,
                                                                    link0_f3_bar2_unit,
                                                                    link0_f3_bar3_unit,
                                                                    link0_f3_bar4_unit,
                                                                    link0_f3_bar5_unit],
                                                                   [link0_f3_bar0_size,
                                                                    link0_f3_bar1_size,
                                                                    link0_f3_bar2_size,
                                                                    link0_f3_bar3_size,
                                                                    link0_f3_bar4_size,
                                                                    link0_f3_bar5_size]
                                                                   )"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG0_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_def'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG1_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_def'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG2_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_def'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG3_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_def'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG4_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_def'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG5_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_def'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG0_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_idx'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG1_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_idx'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG2_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_idx'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG3_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_idx'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG4_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_idx'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG5_BAR_INDEX"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_idx'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG0_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_sup'][0]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG1_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_sup'][1]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG2_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_sup'][2]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG3_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_sup'][3]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG4_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_sup'][4]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_RBAR_CFG5_SUPPORTED_SIZES"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "link0_f3_rbar_params['rbar_sup'][5]"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Resizable BAR Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_INTERRUPT_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable Legacy Interrupt"
                    default             = "True"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Legacy Interrupt"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_INTERRUPT_PIN"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Interrupt Pin"
                    default             = "0"
                    options             = "[('INT A',0),('INT B',1),('INT C',2),('INT D',3)]"
                    editable            = "not MGMT_FTL_MF3_INTERRUPT_DISABLE"
                    hidden              = "MGMT_FTL_MF3_INTERRUPT_DISABLE"
                    group1              = "Legacy Interrupt"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_MSI_CAP_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable MSI Capability"
                    default             = "False"
                    value_expr          = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_MSI_CAP_MULT_MESSAGE_CAPABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Number of MSI vectors"
                    default             = "3"
                    options             = "[('1',0),('2',1),('4',2),('8',3),('16',4),('32',5)]"
                    editable            = "not MGMT_FTL_MF3_MSI_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF3_MSI_CAP_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_MSI_CAP_VEC_MASK_CAPABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable Vector Masking"
                    default             = "True"
                    editable            = "not MGMT_FTL_MF3_MSI_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF3_MSI_CAP_DISABLE"
                    group1              = "MSI Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Disable MSI-X Capability"
                    default             = "True"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf3_msix_cap_table_size"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X Table Size"
                    default             = "8"
                    value_range         = "(1,2048)"
                    editable            = "not MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_MSIX_CAP_TABLE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    value_expr          = "mgmt_ftl_mf3_msix_cap_table_size-1"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_MSIX_CAP_TABLE_SIZE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_FTL_MF3_MSIX_CAP_TABLE_SIZE,'#013b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_MSIX_TABLE_BIR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X Table BAR indicator"
                    default             = "0"
                    options             = "gen_msix_bar_opts(link0_f3_bar0_enable,link0_f3_bar1_enable,link0_f3_bar2_enable,link0_f3_bar3_enable,link0_f3_bar4_enable,link0_f3_bar5_enable)"
                    value_expr          = "gen_msix_bar_opts(link0_f3_bar0_enable,link0_f3_bar1_enable,link0_f3_bar2_enable,link0_f3_bar3_enable,link0_f3_bar4_enable,link0_f3_bar5_enable)[0][1]"
                    drc                 = "(link0_f3_bar0_enable or link0_f3_bar1_enable or link0_f3_bar2_enable or link0_f3_bar3_enable or link0_f3_bar4_enable or link0_f3_bar5_enable)"
                    editable            = "not MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf3_msix_table_offset"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "MSI-X Table Address Offset (8bytes aligned)"
                    default             = "6000"
                    drc                 = "hex_value_drc(mgmt_ftl_mf3_msix_table_offset,8) and ((mgmt_ftl_mf3_msix_table_offset[-1] == '0') or (mgmt_ftl_mf3_msix_table_offset[-1] == '8'))"
                    editable            = "not MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_MSIX_TABLE_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('29\'h'+ ('%x' % (int(mgmt_ftl_mf3_msix_table_offset,16)//8))) if(hex_value_drc(mgmt_ftl_mf3_msix_table_offset,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_MSIX_TABLE_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF3_MSIX_TABLE_OFFSET[4:],16),'#031b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_MSIX_PBA_BIR"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "MSI-X PBA BAR indicator"
                    default             = "0"
                    options             = "gen_msix_bar_opts(link0_f3_bar0_enable,link0_f3_bar1_enable,link0_f3_bar2_enable,link0_f3_bar3_enable,link0_f3_bar4_enable,link0_f3_bar5_enable)"
                    value_expr          = "gen_msix_bar_opts(link0_f3_bar0_enable,link0_f3_bar1_enable,link0_f3_bar2_enable,link0_f3_bar3_enable,link0_f3_bar4_enable,link0_f3_bar5_enable)[0][1]"
                    drc                 = "(link0_f3_bar0_enable or link0_f3_bar1_enable or link0_f3_bar2_enable or link0_f3_bar3_enable or link0_f3_bar4_enable or link0_f3_bar5_enable)"
                    editable            = "not MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf3_msix_pba_offset"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "MSI-X PBA Address Offset (8bytes aligned)"
                    default             = "7000"
                    drc                 = "hex_value_drc(mgmt_ftl_mf3_msix_pba_offset,8) and ((mgmt_ftl_mf3_msix_pba_offset[-1] == '0') or (mgmt_ftl_mf3_msix_pba_offset[-1] == '8'))"
                    editable            = "not MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    hidden              = "MGMT_FTL_MF3_MSIX_CAP_DISABLE"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_MSIX_PBA_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('29\'h'+ ('%x' % (int(mgmt_ftl_mf3_msix_pba_offset,16)//8))) if(hex_value_drc(mgmt_ftl_mf3_msix_pba_offset,8)) else 'ERROR'"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_MSIX_PBA_OFFSET"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(int(MGMT_FTL_MF3_MSIX_PBA_OFFSET[4:],16),'#031b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "MSI-X Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_DSN_CAP_ENABLE"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "bool"
                    title               = "Enable DSN Capability"
                    default             = "False"
                    editable            = "not MGMT_FTL_MF3_FUNCTION_DISABLE"
                    hidden              = "MGMT_FTL_MF3_FUNCTION_DISABLE"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "mgmt_ftl_mf3_dsn_serial_number"
                    type                = "input"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    title               = "Serial Number"
                    default             = "0"
                    drc                 = "hex_value_drc(mgmt_ftl_mf3_dsn_serial_number,16)"
                    editable            = "MGMT_FTL_MF3_DSN_CAP_ENABLE"
                    hidden              = "not MGMT_FTL_MF3_DSN_CAP_ENABLE"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "MGMT_FTL_MF3_DSN_SERIAL_NUMBER"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "('64\'h'+ mgmt_ftl_mf3_dsn_serial_number)"
                    output_formatter    = "nostr"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_DSN_SERIAL_NUMBER_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(bitwise_and((int(MGMT_FTL_MF3_DSN_SERIAL_NUMBER[4:],16)//(2**32)),(0xFFFFFFFF)),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 3"
    />

    <lsccip:setting id                  = "FTL_MF3_DSN_SERIAL_NUMBER_L"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(bitwise_and(int(MGMT_FTL_MF3_DSN_SERIAL_NUMBER[4:],16),(0xFFFFFFFF)),'#034b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Device Serial Number Capability"
                    group2              = "Function 3"
    />

  <!--Buffer Allocation-->
    <lsccip:setting id                  = "MGMT_PTL_RX_ALLOC_P_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Posted Header Credits (20 bytes/credit)"
                    value_range         = "(1,16)"
                    default             = "16"
                    editable            = "1"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_RX_ALLOC_P_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Posted Data Credits (16 bytes/credit)"
                    value_range         = "((2**(3+LINK0_FTL_PCIE_DEV_CAP_MAX_PAYLOAD_SIZE_SUPPORTED_INPUT)),((2048-(MGMT_PTL_RX_ALLOC_P_H*20))//16))"
                    default             = "108"
                    editable            = "1"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_RX_ALLOC_N_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Non-Posted Header Credits (20 bytes/credit)"
                    value_range         = "(1,8)"
                    default             = "8"
                    editable            = "1"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_RX_ALLOC_N_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Non-Posted Data Credits (16 bytes/credit)"
                    value_range         = "(2,((256-(MGMT_PTL_RX_ALLOC_N_H*20))//16))"
                    default             = "6"
                    editable            = "1"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_RX_ALLOC_C_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Completion Header Credits (20 bytes/credit)"
                    value_range         = "(1,32)"
                    default             = "32"
                    editable            = "1"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_RX_ALLOC_C_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Completion Data Credits (16 bytes/credit)"
                    value_range         = "((2**(3+LINK0_FTL_PCIE_DEV_CAP_MAX_PAYLOAD_SIZE_SUPPORTED_INPUT)),((2048-(MGMT_PTL_RX_ALLOC_C_H*16))//16))"
                    default             = "96"
                    editable            = "1"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_TX_ALLOC_P_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Posted Header Credits (20 bytes/credit)"
                    value_range         = "(1,16)"
                    default             = "16"
                    editable            = "1"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_TX_ALLOC_P_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Posted Data Credits (16 bytes/credit)"
                    value_range         = "((2**(3+LINK0_FTL_PCIE_DEV_CAP_MAX_PAYLOAD_SIZE_SUPPORTED_INPUT)),((2048-(MGMT_PTL_TX_ALLOC_P_H*20))//16))"
                    default             = "108"
                    editable            = "1"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_TX_ALLOC_N_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Non-Posted Header Credits (20 bytes/credit)"
                    value_range         = "(1,8)"
                    default             = "8"
                    editable            = "1"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_TX_ALLOC_N_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Non-Posted Data Credits (16 bytes/credit)"
                    value_range         = "(2,((256-(MGMT_PTL_TX_ALLOC_N_H*20))//16))"
                    default             = "6"
                    editable            = "1"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_TX_ALLOC_C_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Completion Header Credits (20 bytes/credit)"
                    value_range         = "(1,32)"
                    default             = "32"
                    editable            = "1"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "MGMT_PTL_TX_ALLOC_C_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "int"
                    title               = "Completion Data Credits (16 bytes/credit)"
                    value_range         = "((2**(3+LINK0_FTL_PCIE_DEV_CAP_MAX_PAYLOAD_SIZE_SUPPORTED_INPUT)),((2048-(MGMT_PTL_TX_ALLOC_C_H*16))//16))"
                    default             = "96"
                    editable            = "1"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_RX_ALLOC_P_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_RX_ALLOC_P_H,'#014b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_RX_ALLOC_P_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_RX_ALLOC_P_D,'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_RX_ALLOC_N_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_RX_ALLOC_N_H,'#014b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_RX_ALLOC_N_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_RX_ALLOC_N_D,'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_RX_ALLOC_C_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_RX_ALLOC_C_H,'#014b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_RX_ALLOC_C_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_RX_ALLOC_C_D,'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Receive Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_TX_ALLOC_P_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_TX_ALLOC_P_H,'#014b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_TX_ALLOC_P_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_TX_ALLOC_P_D,'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_TX_ALLOC_N_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_TX_ALLOC_N_H,'#014b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_TX_ALLOC_N_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_TX_ALLOC_N_D,'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_TX_ALLOC_C_H"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_TX_ALLOC_C_H,'#014b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />

    <lsccip:setting id                  = "PTL_TX_ALLOC_C_D"
                    type                = "param"
                    conn_mod            = "lscc_pcie_gen3"
                    value_type          = "string"
                    value_expr          = "format(MGMT_PTL_TX_ALLOC_C_D,'#018b')"
                    editable            = "0"
                    hidden              = "True"
                    group1              = "Transmit Buffer Allocation"
                    group2              = "Flow Control"
    />


  </lsccip:settings>

  <lsccip:ports>
    <!-- Serial Port and Reference Clock -->
    <lsccip:port name      = "link0_rxp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "rxp_i"
    />

    <lsccip:port name      = "link0_rxn_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "rxn_i"
    />

    <lsccip:port name      = "refclkp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
    />

    <lsccip:port name      = "refclkn_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
    />

    <lsccip:port name      = "link0_aux_clk_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "aux_clk_i"
    />

    <lsccip:port name      = "link0_txp_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "txp_o"
    />

    <lsccip:port name      = "link0_txn_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "txn_o"
    />

    <lsccip:port name      = "refret_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
    />

    <lsccip:port name      = "rext_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
    />

    <lsccip:port name      = "link0_clkreq_n_io"
                 dir       = "inout"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "clkreq_n_io"
                 dangling  = "not USE_CLKREQ_SIGNAL"
    />

    <!-- Clock and Reset Interface -->
    <lsccip:port name      = "link0_perst_n_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "perst_n_i"
    />

    <lsccip:port name      = "link0_rst_usr_n_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "rst_usr_n_i"
    />

    <lsccip:port name      = "sys_clk_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "clk_usr_i"
		 stick_low = "(EN_AXI_DMA_ED)"
    />

    <lsccip:port name      = "link0_flr_ack_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "flr_ack_i"
                 conn_range= "(3,3)"
                 range     = "(3,3)"
                 stick_low = "LINK0_FTL_PCIE_DEV_CAP_DISABLE_FLR_CAPABILITY or (LINK0_NUM_FUNCTIONS != 4)"
    />

    <lsccip:port name      = "link0_flr_ack_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "flr_ack_i"
                 conn_range= "(2,2)"
                 range     = "(2,2)"
                 stick_low = "LINK0_FTL_PCIE_DEV_CAP_DISABLE_FLR_CAPABILITY or (LINK0_NUM_FUNCTIONS == 1) or (LINK0_NUM_FUNCTIONS == 2)"
    />

    <lsccip:port name      = "link0_flr_ack_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "flr_ack_i"
                 conn_range= "(1,1)"
                 range     = "(1,1)"
                 stick_low = "LINK0_FTL_PCIE_DEV_CAP_DISABLE_FLR_CAPABILITY or (LINK0_NUM_FUNCTIONS == 1)"
    />

    <lsccip:port name      = "link0_flr_ack_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "flr_ack_i"
                 conn_range= "(0,0)"
                 range     = "(0,0)"
                 stick_low = "LINK0_FTL_PCIE_DEV_CAP_DISABLE_FLR_CAPABILITY"
    />

    <lsccip:port name      = "link0_clk_usr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "clk_usr_o"
    />

    <lsccip:port name      = "link0_pl_link_up_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "u_pl_link_up_o"
    />

    <lsccip:port name      = "link0_dl_link_up_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "u_dl_link_up_o"
    />

    <lsccip:port name      = "link0_tl_link_up_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "u_tl_link_up_o"
    />

    <lsccip:port name      = "link0_flr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "flr_o"
                 range     = "((LINK0_NUM_FUNCTIONS-1),0)"
                 dangling  = "LINK0_FTL_PCIE_DEV_CAP_DISABLE_FLR_CAPABILITY"
    />

    <lsccip:port name      = "link0_ltssm_disable_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "u_ltssm_disable_i"
                 stick_low = "not (EN_LTSSM_DISABLE_PORT)"
    />

    <lsccip:port name      = "link0_done_pcie_init"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 conn_port = "done_pcie_init"
                 dangling  = "1"
    />

    <!-- AHB Lite Write Manager (Data) IF -->
    <lsccip:port name      = "m_w_hready_i"
                 conn_port = "m_w_hready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_hresp_i"
                 conn_port = "m_w_hresp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_hrdata_i"
                 conn_port = "m_w_hrdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_haddr_o"
                 conn_port = "m_w_haddr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_hburst_o"
                 conn_port = "m_w_hburst_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_hmastlock_o"
                 conn_port = "m_w_hmastlock_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_hprot_o"
                 conn_port = "m_w_hprot_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_hsize_o"
                 conn_port = "m_w_hsize_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_htrans_o"
                 conn_port = "m_w_htrans_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_hwrite_o"
                 conn_port = "m_w_hwrite_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <lsccip:port name      = "m_w_hwdata_o"
                 conn_port = "m_w_hwdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_M0"
    />

    <!-- AHB Lite Read manager (Data) IF -->
    <lsccip:port name      = "m_r_hready_i"
                 conn_port = "m_r_hready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_hresp_i"
                 conn_port = "m_r_hresp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_hrdata_i"
                 conn_port = "m_r_hrdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_haddr_o"
                 conn_port = "m_r_haddr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_hburst_o"
                 conn_port = "m_r_hburst_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_hmastlock_o"
                 conn_port = "m_r_hmastlock_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_hprot_o"
                 conn_port = "m_r_hprot_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_hsize_o"
                 conn_port = "m_r_hsize_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_htrans_o"
                 conn_port = "m_r_htrans_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_hwrite_o"
                 conn_port = "m_r_hwrite_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <lsccip:port name      = "m_r_hwdata_o"
                 conn_port = "m_r_hwdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AHB_LITE') or (not EN_DMA_SUPPORT)"
                 bus_interface = "AHBL_DAT_M1"
    />

    <!-- AHB Lite Subordinate (Data) IF -->
    <lsccip:port name      = "s_hready_o"
                 conn_port = "s_hready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hresp_o"
                 conn_port = "s_hresp_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hrdata_o"
                 conn_port = "s_hrdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_haddr_i"
                 conn_port = "s_haddr_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hburst_i"
                 conn_port = "s_hburst_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hmastlock_i"
                 conn_port = "s_hmastlock_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hprot_i"
                 conn_port = "s_hprot_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hsize_i"
                 conn_port = "s_hsize_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_htrans_i"
                 conn_port = "s_htrans_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hwrite_i"
                 conn_port = "s_hwrite_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hreadyin_i"
                 conn_port = "s_hreadyin_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hsel_i"
                 conn_port = "s_hsel_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <lsccip:port name      = "s_hwdata_i"
                 conn_port = "s_hwdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_DAT_SLV"
    />

    <!-- AHB Lite Subordinate (Config) IF -->
    <lsccip:port name      = "c_hready_o"
                 conn_port = "c_hready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hresp_o"
                 conn_port = "c_hresp_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hrdata_o"
                 conn_port = "c_hrdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_haddr_i"
                 conn_port = "c_haddr_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hburst_i"
                 conn_port = "c_hburst_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hmastlock_i"
                 conn_port = "c_hmastlock_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hprot_i"
                 conn_port = "c_hprot_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hsize_i"
                 conn_port = "c_hsize_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_htrans_i"
                 conn_port = "c_htrans_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hwrite_i"
                 conn_port = "c_hwrite_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hreadyin_i"
                 conn_port = "c_hreadyin_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hsel_i"
                 conn_port = "c_hsel_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <lsccip:port name      = "c_hwdata_i"
                 conn_port = "c_hwdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'AHB_LITE')"
                 bus_interface = "AHBL_CFG_SLV"
    />

    <!--DMA_BYPASS interfaces-->
    <!--AXIL-->
    <lsccip:port name      = "m0_axil_awaddr_o"
                 conn_port = "m0_axil_awaddr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
                 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_awprot_o"
                 conn_port = "m0_axil_awprot_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_awvalid_o"
                 conn_port = "m0_axil_awvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_wdata_o"
                 conn_port = "m0_axil_wdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_wstrb_o"
                 conn_port = "m0_axil_wstrb_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_wvalid_o"
                 conn_port = "m0_axil_wvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_bready_o"
                 conn_port = "m0_axil_bready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_araddr_o"
                 conn_port = "m0_axil_araddr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_arvalid_o"
                 conn_port = "m0_axil_arvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_arprot_o"
                 conn_port = "m0_axil_arprot_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_rready_o"
                 conn_port = "m0_axil_rready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
    />

    <lsccip:port name      = "m0_axil_awready_i"
                 conn_port = "m0_axil_awready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
                  
    />

    <lsccip:port name      = "m0_axil_wready_i"
                 conn_port = "m0_axil_wready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
                  
    />

    <lsccip:port name      = "m0_axil_bresp_i"
                 conn_port = "m0_axil_bresp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(1,0)"
                 stick_low  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
                  
    />

    <lsccip:port name      = "m0_axil_bvalid_i"
                 conn_port = "m0_axil_bvalid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
                  
    />

    <lsccip:port name      = "m0_axil_arready_i"
                 conn_port = "m0_axil_arready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
                  
    />

    <lsccip:port name      = "m0_axil_rdata_i"
                 conn_port = "m0_axil_rdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(31,0)"
                 stick_low  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
                  
    />

    <lsccip:port name      = "m0_axil_rresp_i"
                 conn_port = "m0_axil_rresp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(1,0)"
                 stick_low  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
                  
    />

    <lsccip:port name      = "m0_axil_rvalid_i"
                 conn_port = "m0_axil_rvalid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not ((USR_DAT_IF_TYPE == 'AXI_LITE') or ((DMA_BYPASS_IF_TYPE == 'AXI_LITE') and DMA_BYPASS_EN)) or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXILITE_M"
                  
    />

    <!--AXIMM with DMA-->
   <lsccip:port name      = "m0_dma_axi_awid_o"
                 conn_port = "m0_dma_axi_awid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_AXI_ID_WIDTH-1,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_awaddr_o"
                 conn_port = "m0_dma_axi_awaddr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_awlen_o"
                 conn_port = "m0_dma_axi_awlen_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(7,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_awsize_o"
                 conn_port = "m0_dma_axi_awsize_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_awburst_o"
                 conn_port = "m0_dma_axi_awburst_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_awlock_o"
                 conn_port = "m0_dma_axi_awlock_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_awcache_o"
                 conn_port = "m0_dma_axi_awcache_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_awprot_o"
                 conn_port = "m0_dma_axi_awprot_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_awvalid_o"
                 conn_port = "m0_dma_axi_awvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_awready_i"
                 conn_port = "m0_dma_axi_awready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_wdata_o"
                 conn_port = "m0_dma_axi_wdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_AXI_WIDTH-1,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_wstrb_o"
                 conn_port = "m0_dma_axi_wstrb_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_wlast_o"
                 conn_port = "m0_dma_axi_wlast_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_wvalid_o"
                 conn_port = "m0_dma_axi_wvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_wready_i"
                 conn_port = "m0_dma_axi_wready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_bid_i"
                 conn_port = "m0_dma_axi_bid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_AXI_ID_WIDTH-1,0)"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_bresp_i"
                 conn_port = "m0_dma_axi_bresp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_bvalid_i"
                 conn_port = "m0_dma_axi_bvalid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_bready_o"
                 conn_port = "m0_dma_axi_bready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_H2F_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arid_o"
                 conn_port = "m0_dma_axi_arid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_AXI_ID_WIDTH-1,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_araddr_o"
                 conn_port = "m0_dma_axi_araddr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arlen_o"
                 conn_port = "m0_dma_axi_arlen_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(7,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arsize_o"
                 conn_port = "m0_dma_axi_arsize_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arburst_o"
                 conn_port = "m0_dma_axi_arburst_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arlock_o"
                 conn_port = "m0_dma_axi_arlock_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arcache_o"
                 conn_port = "m0_dma_axi_arcache_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arprot_o"
                 conn_port = "m0_dma_axi_arprot_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arvalid_o"
                 conn_port = "m0_dma_axi_arvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arready_i"
                 conn_port = "m0_dma_axi_arready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_rid_i"
                 conn_port = "m0_dma_axi_rid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_AXI_ID_WIDTH-1,0)"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_rdata_i"
                 conn_port = "m0_dma_axi_rdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_AXI_WIDTH-1,0)"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_rresp_i"
                 conn_port = "m0_dma_axi_rresp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_rlast_i"
                 conn_port = "m0_dma_axi_rlast_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_rvalid_i"
                 conn_port = "m0_dma_axi_rvalid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_rready_o"
                 conn_port = "m0_dma_axi_rready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
                  
    />
    <lsccip:port name      = "m0_dma_axi_arqos_o"
                 conn_port = "m0_dma_axi_arqos_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
    />
    <lsccip:port name      = "m0_dma_axi_aruser_o"
                 conn_port = "m0_dma_axi_aruser_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(7,0)"
                 dangling  = "not(EN_AXI_DMA and (USR_DAT_IF_TYPE == 'AXI_MM')) or (NUM_F2H_CHAN == 0)"
                 bus_interface = "AXI_SOFT_DMA_M"
    />

    <!--kyim:AXI_S interfaces-->

   <lsccip:port name      = "tx0_dma_axist_tready_o"
                 conn_port = "tx0_dma_axist_tready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 dangling  = "1"
    />

    <lsccip:port name      = "tx0_dma_axist_tvalid_i"
                 conn_port = "tx0_dma_axist_tvalid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 stick_low = "1"
    />

    <lsccip:port name      = "tx0_dma_axist_tlast_i"
                 conn_port = "tx0_dma_axist_tlast_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 stick_low = "1"
    />

    <lsccip:port name      = "tx0_dma_axist_tdata_i"
                 conn_port = "tx0_dma_axist_tdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_AXI_WIDTH-1,0)"
		 stick_low = "1"
    />

    <lsccip:port name      = "rx0_dma_axist_tready_i"
                 conn_port = "rx0_dma_axist_tready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 stick_low = "1"
    />

    <lsccip:port name      = "rx0_dma_axist_tvalid_o"
                 conn_port = "rx0_dma_axist_tvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 dangling  = "1"
    />

    <lsccip:port name      = "rx0_dma_axist_tlast_o"
                 conn_port = "rx0_dma_axist_tlast_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 dangling  = "1"
    />

    <lsccip:port name      = "rx0_dma_axist_tdata_o"
                 conn_port = "rx0_dma_axist_tdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_AXI_WIDTH-1,0)"
		 dangling  = "1"
    />

    <!--AXIMM_BYPASS Interface-->
    <lsccip:port name      = "m0_aximm_awaddr_o"
                 conn_port = "m0_aximm_awaddr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN) or not EN_AXI_DMA"
                 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

        <lsccip:port name      = "m0_aximm_awprot_o"
                 conn_port = "m0_aximm_awprot_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_arprot_o"
                 conn_port = "m0_aximm_arprot_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_arqos_o"
                 conn_port = "m0_aximm_arqos_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
                 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_arcache_o"
                 conn_port = "m0_aximm_arcache_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
                 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_aruser_o"
                 conn_port = "m0_aximm_aruser_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(7,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
                 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_arlock_o"
                 conn_port = "m0_aximm_arlock_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
                 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_awvalid_o"
                 conn_port = "m0_aximm_awvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_wdata_o"
                 conn_port = "m0_aximm_wdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_wstrb_o"
                 conn_port = "m0_aximm_wstrb_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_wvalid_o"
                 conn_port = "m0_aximm_wvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_bready_o"
                 conn_port = "m0_aximm_bready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_araddr_o"
                 conn_port = "m0_aximm_araddr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_arvalid_o"
                 conn_port = "m0_aximm_arvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_rready_o"
                 conn_port = "m0_aximm_rready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_awid_o"
                 conn_port = "m0_aximm_awid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(7,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_awlen_o"
                 conn_port = "m0_aximm_awlen_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(7,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_awsize_o"
                 conn_port = "m0_aximm_awsize_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(2,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_awburst_o"
                 conn_port = "m0_aximm_awburst_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(1,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_awlock_o"
                 conn_port = "m0_aximm_awlock_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_awcache_o"
                 conn_port = "m0_aximm_awcache_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(3,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_awregion_o"
                 conn_port = "m0_aximm_awregion_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(3,0)"
                 dangling  = "1"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_wuser_o"
                 conn_port = "m0_aximm_wuser_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(7,0)"
                 dangling  = "1"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_wlast_o"
                 conn_port = "m0_aximm_wlast_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_arid_o"
                 conn_port = "m0_aximm_arid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(7,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_arlen_o"
                 conn_port = "m0_aximm_arlen_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(7,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_arsize_o"
                 conn_port = "m0_aximm_arsize_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(2,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_arburst_o"
                 conn_port = "m0_aximm_arburst_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(1,0)"
                 dangling  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_awready_i"
                 conn_port = "m0_aximm_awready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
                  
    />

    <lsccip:port name      = "m0_aximm_wready_i"
                 conn_port = "m0_aximm_wready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
                  
    />

    <lsccip:port name      = "m0_aximm_bresp_i"
                 conn_port = "m0_aximm_bresp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(1,0)"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
                  
    />

    <lsccip:port name      = "m0_aximm_bvalid_i"
                 conn_port = "m0_aximm_bvalid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
                  
    />

    <lsccip:port name      = "m0_aximm_arready_i"
                 conn_port = "m0_aximm_arready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
                  
    />

    <lsccip:port name      = "m0_aximm_rdata_i"
                 conn_port = "m0_aximm_rdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(31,0)"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
                  
    />

    <lsccip:port name      = "m0_aximm_rresp_i"
                 conn_port = "m0_aximm_rresp_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(1,0)"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
                  
    />

    <lsccip:port name      = "m0_aximm_rvalid_i"
                 conn_port = "m0_aximm_rvalid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
                  
    />

    <lsccip:port name      = "m0_aximm_bid_i"
                 conn_port = "m0_aximm_bid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(7,0)"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
                  
    />

    <lsccip:port name      = "m0_aximm_rid_i"
                 conn_port = "m0_aximm_rid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(7,0)"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

    <lsccip:port name      = "m0_aximm_rlast_i"
                 conn_port = "m0_aximm_rlast_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not((DMA_BYPASS_IF_TYPE == 'AXI_MM') and DMA_BYPASS_EN)or not EN_AXI_DMA"
		 bus_interface = "AXI_SOFT_BRIDGE_AXIMM_M"
    />

<!--USR_INT_REQ-->
    <lsccip:port name      = "usr_int_req_i"
                 conn_port = "usr_int_req_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(NUM_USR_INT-1,0)"
                 stick_low  = "not(control_plane_dma)"
                  
    />

    <lsccip:port name      = "usr_int_ack_o"
                 conn_port = "usr_int_ack_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
		 range     = "(NUM_USR_INT-1,0)"
                 dangling  = "not(control_plane_dma)"
                  
    />

<!--CHANNEL 0 F2H-->
    <lsccip:port name      = "chan0_f2h_src_addr_i"
                 conn_port = "chan0_f2h_src_addr_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 stick_low  = "not (EN_AXI_DMA and (C0_F2H_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_f2h_dest_addr_i"
                 conn_port = "chan0_f2h_dest_addr_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 stick_low  = "not (EN_AXI_DMA and (C0_F2H_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_f2h_length_i"
                 conn_port = "chan0_f2h_length_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_LEN-1,0)"
                 stick_low  = "not (EN_AXI_DMA and (C0_F2H_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_f2h_interrupt_i"
                 conn_port = "chan0_f2h_interrupt_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not (EN_AXI_DMA and (C0_F2H_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_f2h_valid_i"
                 conn_port = "chan0_f2h_valid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not (EN_AXI_DMA and (C0_F2H_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_f2h_ready_o"
                 conn_port = "chan0_f2h_ready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not (EN_AXI_DMA and (C0_F2H_DESC_BYP == 1))"
    />

   <!--CHANNEL 0 H2F-->
    <lsccip:port name      = "chan0_h2f_src_addr_i"
                 conn_port = "chan0_h2f_src_addr_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 stick_low  = "not (EN_AXI_DMA and (C0_H2F_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_h2f_dest_addr_i"
                 conn_port = "chan0_h2f_dest_addr_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(63,0)"
                 stick_low  = "not (EN_AXI_DMA and (C0_H2F_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_h2f_length_i"
                 conn_port = "chan0_h2f_length_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(DMA_LEN-1,0)"
                 stick_low  = "not (EN_AXI_DMA and (C0_H2F_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_h2f_interrupt_i"
                 conn_port = "chan0_h2f_interrupt_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not (EN_AXI_DMA and (C0_H2F_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_h2f_valid_i"
                 conn_port = "chan0_h2f_valid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "not (EN_AXI_DMA and (C0_H2F_DESC_BYP == 1))"
    />
    <lsccip:port name      = "chan0_h2f_ready_o"
                 conn_port = "chan0_h2f_ready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not (EN_AXI_DMA and (C0_H2F_DESC_BYP == 1))"
    />

    <!-- APB Completor (Config) IF -->
    <lsccip:port name      = "apb_pclk_i"
                 conn_port = "c_apb_pclk_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'APB')"
    />

    <lsccip:port name      = "apb_presetn_i"
                 conn_port = "c_apb_preset_n_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'APB')"
    />

    <lsccip:port name      = "c_apb_paddr_i"
                 conn_port = "c_apb_paddr_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'APB')"
                 bus_interface = "APB_CFG_S"
    />

    <lsccip:port name      = "c_apb_psel_i"
                 conn_port = "c_apb_psel_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'APB')"
                 bus_interface = "APB_CFG_S"
    />

    <lsccip:port name      = "c_apb_penable_i"
                 conn_port = "c_apb_penable_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'APB')"
                 bus_interface = "APB_CFG_S"
    />

    <lsccip:port name      = "c_apb_pwrite_i"
                 conn_port = "c_apb_pwrite_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'APB')"
                 bus_interface = "APB_CFG_S"
    />

    <lsccip:port name      = "c_apb_pwdata_i"
                 conn_port = "c_apb_pwdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'APB')"
                 bus_interface = "APB_CFG_S"
    />

    <lsccip:port name      = "c_apb_prdata_o"
                 conn_port = "c_apb_prdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_CFG_IF_TYPE != 'APB')"
                 bus_interface = "APB_CFG_S"
    />

    <lsccip:port name      = "c_apb_pready_o"
                 conn_port = "c_apb_pready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_CFG_IF_TYPE != 'APB')"
                 bus_interface = "APB_CFG_S"
    />

    <lsccip:port name      = "c_apb_pslverr_o"
                 conn_port = "c_apb_pslverr_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_CFG_IF_TYPE != 'APB')"
                 bus_interface = "APB_CFG_S"
    />

    <lsccip:port name      = "link0_int_normal_o"
                 conn_port = "int_normal_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(not EN_DMA_SUPPORT)"
                 bus_interface = "INT_NORM"
    />

    <lsccip:port name      = "link0_int_critical_o"
                 conn_port = "int_critical_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(not EN_DMA_SUPPORT)"
                 bus_interface = "INT_CRIT"
    />

  <!-- PCIe Device status -->
    <lsccip:port name      = "link0_user_aux_power_detected_i"
                 conn_port = "user_aux_power_detected_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
    />

    <lsccip:port name      = "link0_user_transactions_pending_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "user_transactions_pending_i"
                 conn_range= "(3,3)"
                 range     = "(3,3)"
                 stick_low = "(LINK0_NUM_FUNCTIONS != 4) or EN_AXI_DMA_ED"
    />

    <lsccip:port name      = "link0_user_transactions_pending_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "user_transactions_pending_i"
                 conn_range= "(2,2)"
                 range     = "(2,2)"
                 stick_low = "(LINK0_NUM_FUNCTIONS == 1) or (LINK0_NUM_FUNCTIONS == 2) or EN_AXI_DMA_ED"
    />

    <lsccip:port name      = "link0_user_transactions_pending_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "user_transactions_pending_i"
                 conn_range= "(1,1)"
                 range     = "(1,1)"
                 stick_low = "(LINK0_NUM_FUNCTIONS == 1) or EN_AXI_DMA_ED"
    />

    <lsccip:port name      = "link0_user_transactions_pending_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "user_transactions_pending_i"
                 conn_range= "(0,0)"
                 range     = "(0,0)"
		 stick_low = "EN_AXI_DMA_ED"
    />

  <!-- PCIe (Power Management) LTR IF -->
    <lsccip:port name      = "link0_pm_ltr_msg_send_i"
                 conn_port = "pm_ltr_msg_send_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "not (EN_LTR_PORTS)"
    />

    <lsccip:port name      = "link0_pm_ltr_nosnoop_req_i"
                 conn_port = "pm_ltr_nosnoop_req_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "not (EN_LTR_PORTS)"
    />

    <lsccip:port name      = "link0_pm_ltr_snoop_req_i"
                 conn_port = "pm_ltr_snoop_req_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "not (EN_LTR_PORTS)"
    />

    <lsccip:port name      = "link0_pm_ltr_nosnoop_i"
                 conn_port = "pm_ltr_nosnoop_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(12,0)"
                 stick_low = "not (EN_LTR_PORTS)"
    />

    <lsccip:port name      = "link0_pm_ltr_snoop_i"
                 conn_port = "pm_ltr_snoop_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(12,0)"
                 stick_low = "not (EN_LTR_PORTS)"
    />

  <!-- PCIe (Power Management) PB IF -->
    <lsccip:port name      = "link0_pm_pb_data_reg_rd_i"
                 conn_port = "pm_pb_data_reg_rd_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "not (EN_PWR_BUDGET_PORTS)"
    />

    <lsccip:port name      = "link0_pm_pb_data_sel_o"
                 conn_port = "pm_pb_data_sel_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(7,0)"
                 dangling  = "not (EN_PWR_BUDGET_PORTS)"
    />

  <!-- PCIe (Power Management) DPA IF -->
    <lsccip:port name      = "link0_pm_dpa_status_i"
                 conn_port = "pm_dpa_status_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(4,0)"
                 stick_low = "not (EN_DPA_PORTS)"
    />

    <lsccip:port name      = "link0_pm_dpa_control_o"
                 conn_port = "pm_dpa_control_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(4,0)"
                 dangling  = "not (EN_DPA_PORTS)"
    />

    <lsccip:port name      = "link0_pm_dpa_control_en_o"
                 conn_port = "pm_dpa_control_en_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "not (EN_DPA_PORTS)"
    />

  <!-- PCIe Configuration Register Access IF -->
    <lsccip:port name      = "ucfg_valid_i"
                 conn_port = "ucfg_valid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or EN_AXI_DMA"
                 bus_interface = "PCIE_CFG_REG"
    />

    <lsccip:port name      = "ucfg_wr_rd_n_i"
                 conn_port = "ucfg_wr_rd_n_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or EN_AXI_DMA"
                 bus_interface = "PCIE_CFG_REG"
    />

    <lsccip:port name      = "ucfg_addr_i"
                 conn_port = "ucfg_addr_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(11,2)"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or EN_AXI_DMA"
                 bus_interface = "PCIE_CFG_REG"
    />

    <lsccip:port name      = "ucfg_f_i"
                 conn_port = "ucfg_f_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(2,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or EN_AXI_DMA"
                 bus_interface = "PCIE_CFG_REG"
    />

    <lsccip:port name      = "ucfg_wr_be_i"
                 conn_port = "ucfg_wr_be_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or EN_AXI_DMA"
                 bus_interface = "PCIE_CFG_REG"
    />

    <lsccip:port name      = "ucfg_wr_data_i"
                 conn_port = "ucfg_wr_data_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or EN_AXI_DMA"
                 bus_interface = "PCIE_CFG_REG"
    />

    <lsccip:port name      = "ucfg_use_lmmi_rdata_i"
                 conn_port = "ucfg_use_lmmi_rdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "1"
    />

    <lsccip:port name      = "ucfg_rd_data_o"
                 conn_port = "ucfg_rd_data_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_CFG_IF_TYPE != 'LMMI') or EN_AXI_DMA"
                 bus_interface = "PCIE_CFG_REG"
    />

    <lsccip:port name      = "ucfg_rd_done_o"
                 conn_port = "ucfg_rd_done_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_CFG_IF_TYPE != 'LMMI') or EN_AXI_DMA"
                 bus_interface = "PCIE_CFG_REG"
    />

    <lsccip:port name      = "ucfg_ready_o"
                 conn_port = "ucfg_ready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_CFG_IF_TYPE != 'LMMI') or EN_AXI_DMA"
                 bus_interface = "PCIE_CFG_REG"
    />

  <!-- PCIe LL User LMMI -->
    <lsccip:port name      = "usr_lmmi_clk_i"
                 conn_port = "usr_lmmi_clk_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or (EN_AXI_DMA_ED)"
                 bus_interface = "LMMI_SLV"
    />

    <lsccip:port name      = "usr_lmmi_resetn_i"
                 conn_port = "usr_lmmi_resetn_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or (EN_AXI_DMA_ED)"
                 bus_interface = "LMMI_SLV"
    />

    <lsccip:port name      = "usr_lmmi_request_i"
                 conn_port = "usr_lmmi_request_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or (EN_AXI_DMA_ED)"
                 bus_interface = "LMMI_SLV"
    />

    <lsccip:port name      = "usr_lmmi_wr_rdn_i"
                 conn_port = "usr_lmmi_wr_rdn_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or (EN_AXI_DMA_ED)"
                 bus_interface = "LMMI_SLV"
    />

    <lsccip:port name      = "usr_lmmi_wdata_i"
                 conn_port = "usr_lmmi_wdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or (EN_AXI_DMA_ED)"
                 bus_interface = "LMMI_SLV"
    />

    <lsccip:port name      = "usr_lmmi_offset_i"
                 conn_port = "usr_lmmi_offset_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(16,2)"
                 stick_low = "(USR_CFG_IF_TYPE != 'LMMI') or (EN_AXI_DMA_ED)"
                 bus_interface = "LMMI_SLV"
    />

    <lsccip:port name      = "usr_lmmi_rdata_o"
                 conn_port = "usr_lmmi_rdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_CFG_IF_TYPE != 'LMMI') or (EN_AXI_DMA_ED)"
                 bus_interface = "LMMI_SLV"
    />

    <lsccip:port name      = "usr_lmmi_rdata_valid_o"
                 conn_port = "usr_lmmi_rdata_valid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_CFG_IF_TYPE != 'LMMI') or (EN_AXI_DMA_ED)"
                 bus_interface = "LMMI_SLV"
    />

    <lsccip:port name      = "usr_lmmi_ready_o"
                 conn_port = "usr_lmmi_ready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_CFG_IF_TYPE != 'LMMI') or (EN_AXI_DMA_ED)"
                 bus_interface = "LMMI_SLV"
    />

  <!-- PCIe LL Rx TLP interface -->
    <lsccip:port name      = "link0_rx_ready_i"
                 conn_port = "vc_rx_ready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

    <lsccip:port name      = "link0_rx_credit_init_i"
                 conn_port = "vc_rx_credit_init_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "TLP_NP_CREDIT"
    />

    <lsccip:port name      = "link0_rx_credit_nh_i"
                 conn_port = "vc_rx_credit_nh_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(11,0)"
                 stick_low = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "TLP_NP_CREDIT"
    />

    <lsccip:port name      = "link0_rx_credit_nh_inf_i"
                 conn_port = "vc_rx_credit_nh_inf_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "TLP_NP_CREDIT"
    />

    <lsccip:port name      = "link0_rx_credit_return_i"
                 conn_port = "vc_rx_credit_return_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "TLP_NP_CREDIT"
    />

    <lsccip:port name      = "link0_rx_valid_o"
                 conn_port = "vc_rx_valid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

    <lsccip:port name      = "link0_rx_sel_o"
                 conn_port = "vc_rx_sel_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

    <lsccip:port name      = "link0_rx_cmd_data_o"
                 conn_port = "vc_rx_cmd_data_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(12,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

    <lsccip:port name      = "link0_rx_sop_o"
                 conn_port = "vc_rx_sop_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

    <lsccip:port name      = "link0_rx_data_o"
                 conn_port = "vc_rx_data_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

    <lsccip:port name      = "link0_rx_datap_o"
                 conn_port = "vc_rx_datap_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

    <lsccip:port name      = "link0_rx_eop_o"
                 conn_port = "vc_rx_eop_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

    <lsccip:port name      = "link0_rx_err_ecrc_o"
                 conn_port = "vc_rx_err_ecrc_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

    <lsccip:port name      = "link0_rx_f_o"
                 conn_port = "vc_rx_f_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(1,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'TLP')"
                 bus_interface = "RX_TLP"
    />

  <!-- PCIe LL Tx TLP interface -->
    <lsccip:port name      = "link0_tx_valid_i"
                 conn_port = "vc_tx_valid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TX_TLP"
    />

    <lsccip:port name      = "link0_tx_eop_i"
                 conn_port = "vc_tx_eop_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TX_TLP"
    />

    <lsccip:port name      = "link0_tx_eop_n_i"
                 conn_port = "vc_tx_eop_n_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TX_TLP"
    />

    <lsccip:port name      = "link0_tx_sop_i"
                 conn_port = "vc_tx_sop_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TX_TLP"
    />

    <lsccip:port name      = "link0_tx_data_i"
                 conn_port = "vc_tx_data_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TX_TLP"
    />

    <lsccip:port name      = "link0_tx_datap_i"
                 conn_port = "vc_tx_datap_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TX_TLP"
    />

    <lsccip:port name      = "link0_tx_ready_o"
                 conn_port = "vc_tx_ready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TX_TLP"
    />

    <lsccip:port name      = "link0_tx_credit_init_o"
                 conn_port = "vc_tx_credit_init_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TLP_NP_CREDIT"
    />

    <lsccip:port name      = "link0_tx_credit_return_o"
                 conn_port = "vc_tx_credit_return_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TLP_NP_CREDIT"
    />

    <lsccip:port name      = "link0_tx_credit_nh_o"
                 conn_port = "vc_tx_credit_nh_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(11,0)"
                 dangling  = "(USR_SLV_IF_TYPE != 'TLP')"
                 bus_interface = "TLP_NP_CREDIT"
    />

  <!-- PCIe LL Legacy Interrupt interface -->
    <lsccip:port name      = "link0_legacy_interrupt_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "legacy_interrupt_i"
                 conn_range= "(3,3)"
                 range     = "(3,3)"
                 stick_low = "(LINK0_FTL_INTERRUPT_DISABLE or (not PCIE_LL_MAIN_CTRL_4_EN_PORT_MGMT_INTERRUPT_LEG)) or (LINK0_NUM_FUNCTIONS != 4)"
    />

    <lsccip:port name      = "link0_legacy_interrupt_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "legacy_interrupt_i"
                 conn_range= "(2,2)"
                 range     = "(2,2)"
                 stick_low = "(LINK0_FTL_INTERRUPT_DISABLE or (not PCIE_LL_MAIN_CTRL_4_EN_PORT_MGMT_INTERRUPT_LEG)) or (LINK0_NUM_FUNCTIONS == 1) or (LINK0_NUM_FUNCTIONS == 2)"
    />

    <lsccip:port name      = "link0_legacy_interrupt_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "legacy_interrupt_i"
                 conn_range= "(1,1)"
                 range     = "(1,1)"
                 stick_low = "(LINK0_FTL_INTERRUPT_DISABLE or (not PCIE_LL_MAIN_CTRL_4_EN_PORT_MGMT_INTERRUPT_LEG)) or (LINK0_NUM_FUNCTIONS == 1)"
    />

    <lsccip:port name      = "link0_legacy_interrupt_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 conn_port = "legacy_interrupt_i"
                 conn_range= "(0,0)"
                 range     = "(0,0)"
                 stick_low = "(LINK0_FTL_INTERRUPT_DISABLE or (not PCIE_LL_MAIN_CTRL_4_EN_PORT_MGMT_INTERRUPT_LEG))"
    />

    <lsccip:port name      = "link0_legacy_interrupt_o"
                 conn_port = "legacy_interrupt_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(LINK0_FTL_INTERRUPT_DISABLE or (not PCIE_LL_MAIN_CTRL_4_EN_PORT_MGMT_INTERRUPT_LEG))"
    />

  <!-- AXI4 Stream Transmitter Interface -->
    <lsccip:port name      = "m0_tready_i"
                 conn_port = "m0_tready_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_MST_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_M"
    />

    <lsccip:port name      = "m0_tvalid_o"
                 conn_port = "m0_tvalid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_M"
    />

    <lsccip:port name      = "m0_tlast_o"
                 conn_port = "m0_tlast_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_MST_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_M"
    />

    <lsccip:port name      = "m0_tdata_o"
                 conn_port = "m0_tdata_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_M"
    />

    <lsccip:port name      = "m0_tstrb_o"
                 conn_port = "m0_tstrb_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_M"
    />

    <lsccip:port name      = "m0_tkeep_o"
                 conn_port = "m0_tkeep_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_M"
    />

    <lsccip:port name      = "m0_tid_o"
                 conn_port = "m0_tid_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(7,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_M"
    />

    <lsccip:port name      = "m0_tdest_o"
                 conn_port = "m0_tdest_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 dangling  = "(USR_MST_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_M"
    />

  <!-- AXI4 Stream Receiver Interface -->
    <lsccip:port name      = "s0_tready_o"
                 conn_port = "s0_tready_o"
                 dir       = "out"
                 conn_mod  = "lscc_pcie_gen3"
                 dangling  = "(USR_SLV_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_S"
    />

    <lsccip:port name      = "s0_tvalid_i"
                 conn_port = "s0_tvalid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low  = "(USR_SLV_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_S"
    />

    <lsccip:port name      = "s0_tlast_i"
                 conn_port = "s0_tlast_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 stick_low = "(USR_SLV_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_S"
    />

    <lsccip:port name      = "s0_tdata_i"
                 conn_port = "s0_tdata_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(31,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_S"
    />

    <lsccip:port name      = "s0_tstrb_i"
                 conn_port = "s0_tstrb_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_S"
    />

    <lsccip:port name      = "s0_tkeep_i"
                 conn_port = "s0_tkeep_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_S"
    />

    <lsccip:port name      = "s0_tid_i"
                 conn_port = "s0_tid_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(7,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_S"
    />

    <lsccip:port name      = "s0_tdest_i"
                 conn_port = "s0_tdest_i"
                 dir       = "in"
                 conn_mod  = "lscc_pcie_gen3"
                 range     = "(3,0)"
                 stick_low = "(USR_SLV_IF_TYPE != 'AXI_STREAM') or (EN_AXI_DMA)"
                 bus_interface = "AXI4STRM_S"
    />

  </lsccip:ports>
<!--must insert between ports and bus_interface-->
  <lsccip:outFileConfigs>
    <lsccip:fileConfig name="wrapper" file_suffix="sv" file_description="top_level_system_verilog"></lsccip:fileConfig>
    <lsccip:fileConfig name           = "Simulation_Do_File"
                       description    = "Simulation Do File"
                       phase          = "10"
                       file_base_name = "sim"
                       file_suffix    = "do"
                       enable_output  = "True"
                       sub_dir        = "testbench"
                       file_generator = "TemplateFileGenerator"
                       template       = "testbench/sim.do"
                       var_lib_path   = "LFD2NX"
    />
  </lsccip:outFileConfigs>
  <xi:include href="bus_interface.xml" parse="xml" />
  <xi:include href="address_space.xml" parse="xml" />
  <xi:include href="memory_map.xml" parse="xml" />

<!--
     
  <lsccip:componentGenerators>
    <lsccip:componentGenerator>
      <lsccip:name>pcie_gen3_eval</lsccip:name>
      <lsccip:generatorExe>testbench/pcie_gen3_eval_gen.py</lsccip:generatorExe>
    </lsccip:componentGenerator>
  </lsccip:componentGenerators>
-->
</lsccip:ip>