The Lattice Semiconductor Pixel-to-Byte Converter IP converts a standard parallel video interface to DSI or CSI-2 data.
LIFCL-40, LIFCL-17, LFD2NX-40, LFD2NX-17, LFCPNX-100, LFMXO5-25, LIFCL-33, LAV-AT-500E
| 1.5.0 |
Added support for Avant Added new configurations for APB and AXI4 Stream support. Provided internal FIFO configurability in GUI. |
| 1.4.0 |
Added new configurations for 4 pixel per clock input. Added LIFCL-33 and LFMX05-25 in the list of the supported device. |
| 1.3.0 |
Added new configurations for 1 and 2 pixel per clock input. Recoded core modules for different data types. |
| 1.2.0 |
Added Non-Burst Sync pulses support for DSI data types. Added RAW14 and RAW16 CSI-2 data types. Added support for CertusPro-NX |
| 1.1.0 |
Changed the output width and the byte ordering to ordinal sequence. Added support for Certus-NX |
| 1.0.1 | Production release. |
| 1.0.0 | Initial release. |