The Lattice QSPI Flash Controller IP core supports the SPI, DSPI, and QSPI protocols to perform operations on the target flash device.
A Quad Serial Peripheral Interface (QSPI) is a four-tri-state data line serial interface that is commonly used to program, erase, and read SPI Flash memories. QSPI enhances the throughput of a standard SPI by four times since four bits are transferred every clock cycle.
A Dual Serial Peripheral Interface (DSPI) uses two tri-state data lines and is used to program, erase, and read SPI flash memories. DSPI transfers two bits with every clock cycle.
A Standard Serial Peripheral Interface (SPI) uses separate data lines for input and output to perform flash operations.
CrossLink-NX, Certus-NX(LFD2NX-17, LFD2NX-40), CertusPro-NX, MachXO5-NX(LFMXO5-25, LFMXO5-55T, LFMXO5-100T), Lattice Avant(LAV-AT-E70, LAV-AT-G70, LAV-AT-X70), Certus-N2(LN2-CT-20)