<?xml version="1.0"?>
<lsccip:ip version="1.0"
    xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
    xmlns:lsccip="http://www.latticesemi.com/XMLSchema/Radiant/ip"
    xmlns:xi="http://www.w3.org/2001/XInclude">
    
    <lsccip:general>
        <lsccip:vendor>latticesemi.com</lsccip:vendor>
        <lsccip:library>ip</lsccip:library>
        <lsccip:name>slvsec_rx</lsccip:name>
        <lsccip:display_name>SLVS-EC Receiver</lsccip:display_name>
        <lsccip:version>1.2.4</lsccip:version>
        <lsccip:category>Audio_Video_and_Image_Processing</lsccip:category>
        <lsccip:keywords>BusType_AXI4,BusType_APB</lsccip:keywords>
        <lsccip:min_radiant_version>2023.2</lsccip:min_radiant_version>
        <lsccip:min_esi_version>2023.2</lsccip:min_esi_version>
        <lsccip:supported_products>
            <lsccip:supported_family name="LFCPNX">
                <lsccip:supported_device name="LFCPNX-100"/>
            </lsccip:supported_family>            
        </lsccip:supported_products>
    <lsccip:supported_platforms>
      <lsccip:supported_platform name="esi"/>
      <lsccip:supported_platform name="radiant"/>
    </lsccip:supported_platforms>  
    </lsccip:general>
    <lsccip:settings>
        <lsccip:setting 
           id                  = "FAMILY"
           type                = "param"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "string"
           title               = "Family"
           value_expr          = "runtime_info.device_info.architecture(1)"
           editable            = "False"
           hidden              = "True"
           group1              = "General"
        />   
        <lsccip:setting
            id                 = "LANE_WIDTH"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "Number of RX Lanes"
            description        = "Number of SLVS-EC Receiver Lanes."
            default            = "8"
            options            = "[1, 2, 4, 6, 8]"
            group1             = "General"
        />
        <lsccip:setting
            id                 = "LANE_ID"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "string"
            title              = "PCS Lane ID"
            description        = "Specifies the location of the first lane of the 
                                  PCS instance. Refer to Section 2.1.1 of MPCS 
                                  Module User’s Guide for the rules in selecting the Lane ID."
            default            = "AUTO"
            options            = "lane_id_opt(LANE_WIDTH)"
            group1             = "General"
        />
        <lsccip:setting
            id                 = "TX_RX_BOND_MODE_Q0"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "string"
            title              = "PCS Bond Mode Q0"
            hidden             = "True"
            value_expr         = "bonding_mode_q0(LANE_ID, LANE_WIDTH)"
            editable           = "False"
            group1             = "General"
        />
        <lsccip:setting
            id                 = "TX_RX_BOND_MODE_Q1"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "string"
            title              = "PCS Bond Mode Q1"
            hidden             = "True"
            value_expr         = "bonding_mode_q1(LANE_ID, LANE_WIDTH)"
            editable           = "False"
            group1             = "General"
        />
        <lsccip:setting
            id                 = "TX_RX_DIVMODE_0"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "PMA Clock Divider"
            hidden             = "True"
            value_expr         = "2 if (BAUD_GRADE == 3 )
                                    else 1"
            editable           = "False"
            group1             = "General"
        />
        <lsccip:setting
            id                 = "TX_RX_M_A"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "PLL M Setting"
            hidden             = "True"
            value_expr         = "pll_m(BAUD_GRADE)"
            editable           = "False"
            group1             = "General"
        />
        <lsccip:setting
            id                 = "TX_RX_F_A"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "PLL F Setting"
            hidden             = "True"
            value_expr         = "pll_f(BAUD_GRADE)"
            editable           = "False"
            group1             = "General"
        />
        <lsccip:setting
            id                 = "TX_RX_N_A"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "PLL N Setting"
            hidden             = "True"
            value_expr         = "pll_n(BAUD_GRADE)"
            editable           = "False"
            group1             = "General"
        />
        <lsccip:setting
            id                 = "BIT_PER_PIXEL"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "Data Type (RAW Data Format)"
            description        = "Number of Bits per Pixel in RAW Data Format."
            default            = "16"
            options            = "[14, 12, 10, 16, 8]" 
            group1             = "General"
        />
        <lsccip:setting
            id                 = "BIT_WIDTH"
            type               = "input"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "MPCS Output Data Width"
            value_expr         = "ext_bit_width(BAUD_GRADE, LANE_WIDTH)"
            default            = "256"
            editable           = "False"
            hidden             = "True"
            group1             = "General"
        />
        <lsccip:setting        
           id                  = "NATIVE_INTF"
           type                = "param"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "bool"
           title               = "Enable Native Interface"
           description         = "Set Native interface."
           default             = "True"        
           bool_value_mapping  = "('ENABLED', 'DISABLED')"
           drc                 = "ext_drc_dataif(NATIVE_INTF,AXI4_INTF,UVSI_INTF)"
           group1              = "Data Interface Type"
        />
        <lsccip:setting        
           id                  = "AXI4_INTF"
           type                = "param"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "bool"
           title               = "Enable AXI4-Stream Transmitter Interface"
           description         = "Set AXI4-Stream Transmitter Interface."
           default             = "False"        
           bool_value_mapping  = "('ENABLED', 'DISABLED')"
           group1              = "Data Interface Type"
        />
        <lsccip:setting        
           id                  = "UVSI_INTF"
           type                = "param"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "bool"
           title               = "Enable Unified Video Streaming Transmitter Interface"
           description         = "Set Unified Video Streaming Transmitter Interface."
           default             = "False"        
           bool_value_mapping  = "('ENABLED', 'DISABLED')"
           group1              = "Data Interface Type"
        />
        <lsccip:setting
            id                 = "BAUD_GRADE"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "Baud Grade"
            description        = "Baud grade setting. 3: Baud Rate = up to 5000 Mbps; 
                                  2: Baud Rate = up to 2500 Mbps; 
                                  1: Baud Rate = up to 1250 Mbps."
            default            = "3"
            options            = "[1, 2, 3]"
            group1             = "Data Rate"
        />
        <lsccip:setting 
           id                 = "MPCS_CLK"
           type               = "input"
           conn_mod           = "lscc_slvsec_rx"
           value_type         = "float"
           title              = "Reference Clock Frequency (MHz)"
           description        = "Reference Clock Frequency (MHz). The MPCS PLL 
                                 settings for each baud grade are pre-configured.
                                 There are only a range of reference clock 
                                 frequencies that are supported by MPCS/SerDes. 
                                 For details, refer to CertusPro-NX SerDes/PCS 
                                 Usage Guide (FPGA-TN-02245). "
           value_range         = "(74.25,125)"
           default            = "125"
           editable           = "True"
           drc                 = "ext_drc_mpcs_clk(MPCS_CLK)"
           group1             = "Data Rate"
        />
        <lsccip:setting 
           id                 = "MPCS_RATE"
           type               = "input"
           conn_mod           = "lscc_slvsec_rx"
           value_type         = "float"
           title              = "MPCS Bit Rate (Mbps)"
           description        = "MPCS data rate per lane."
           value_expr         = "MPCS_CLK*40 if (BAUD_GRADE == 3 )
                                 else (MPCS_CLK*20 if (BAUD_GRADE == 2 )
                                 else MPCS_CLK*10)"
           default            = "125"
           editable           = "False"
           group1             = "Data Rate"
        />
        <lsccip:setting 
           id                  = "EFF_DATA_RATE"
           type                = "input"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "float"
           title               = "MPCS Effective Data Rate (Mbps)"
           description         = "Total effective MPCS output data rate."
           value_expr          = "BIT_WIDTH*MPCS_CLK"
           default             = "8000"
           editable            = "False"
           hidden              = "False"
           group1              = "Data Rate"
        />
        <lsccip:setting
            id                 = "PIX_PER_CLK"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "Number of Output Pixels per Pixel Clock"
            description        = "Fixed value of output pixels per pixel clock 
                                  depending on the Data Type, MPCS Data Bytes, 
                                  and Number of RX Lanes. Refer to IP User Guide 
                                  for more details."
            value_expr         = "ext_pix_per_clk(BIT_PER_PIXEL,BIT_WIDTH,'PPC')"
            default            = "32"
            editable           = "False"
			hidden             = "not NATIVE_INTF and not AXI4_INTF"
            group1             = "Pixel Interface"
        />
		<lsccip:setting
            id                 = "PIX_PER_CLK_UVSI"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "Number of Output Pixels per Pixel Clock (UVSI)"
            description        = "Fixed value of output pixels per pixel clock 
                                  for Unified Video Streaming Interface."
            options            = "ext_pix_per_clk_uvsi(BIT_WIDTH)"
            editable           = "True"
			hidden             = "not UVSI_INTF"
            group1             = "Pixel Interface"
        />
        <lsccip:setting
		    id				   = "UVSI_WIDTH"
            type			   = "param"
            conn_mod		   = "lscc_slvsec_rx"
            value_type		   = "int"
            title              = "Byte-to-Pixel TDATA Width (UVSI)"
            description        = "Width of B2P Unified Streaming Output Interface"
            value_expr		   = "getUVSI_WIDTH(PIX_PER_CLK_UVSI,BIT_PER_PIXEL)"
            editable           = "False"
            hidden			   = "True"
            group1			   = "Pixel Interface"
        />
        <lsccip:setting
            id                 = "PIX_WIDTH"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "Number of Output Pixels per Pixel Clock"
            value_expr         = "PIX_PER_CLK*BIT_PER_PIXEL"
            default            = "1"
            editable           = "False"
            hidden             = "True"
            group1             = "Pixel Interface"
        />
        <lsccip:setting 
           id                  = "PIX_CLK"
           type                = "param"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "float"
           title               = "Pixel Clock Frequency (MHz)"
           description         = "Input clock frequency for the pixel clock domain."
           value_range         = "(10,250)"
           default             = "125"
           group1              = "Pixel Interface"
        />
        <lsccip:setting 
           id                  = "OUT_DATA_RATE"
           type                = "input"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "float"
           title               = "Effective Output Data Rate (Mbps)"
           description         = "Effective output data rate in pixel clock domain."
           drc                 = "ext_pix_clk_drc(EFF_DATA_RATE,OUT_DATA_RATE,NATIVE_INTF,AXI4_INTF)"
           value_expr          = "BIT_PER_PIXEL*PIX_PER_CLK*PIX_CLK"
           default             = "8000"
           editable            = "False"
           hidden              = "not NATIVE_INTF and not AXI4_INTF"
           group1              = "Pixel Interface"
        />  
        <lsccip:setting 
           id                  = "OUT_DATA_RATE_UVSI"
           type                = "input"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "float"
           title               = "Effective Output Data Rate from UVSI (Mbps)"
           description         = "Effective output data rate from UVSI in pixel clock domain."
           drc                 = "ext_pix_clk_drc(EFF_DATA_RATE,OUT_DATA_RATE_UVSI,UVSI_INTF,0)"
           value_expr          = "BIT_PER_PIXEL*PIX_PER_CLK_UVSI*PIX_CLK"
           default             = "8000"
           editable            = "False"
           hidden              = "not UVSI_INTF"
           group1              = "Pixel Interface"
        />  
        <lsccip:setting 
           id                  = "MAN_ADJ"
           type                = "input"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "bool"
           title               = "Manual Adjust"
           description         = "Enable to manually adjust FIFO Depth and FIFO Delay settings."
           default             = "False"
           hidden              = "not NATIVE_INTF and not AXI4_INTF"
           group1              = "FIFO"
           drc                 = "ext_drc_fifo_adj(MAN_ADJ)"
        />
        <lsccip:setting
            id                 = "LINE_LENGTH"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "Pixel Count"
            description        = "Number of pixels per line."
            default            = "1920"
            value_range        = "(1, 16384)"
            group1             = "Header Analysis"
            drc                = "ext_drc_line_length(LINE_LENGTH,BIT_PER_PIXEL,PIX_PER_CLK)"
        />
        <lsccip:setting
            id                 = "BUFFER_DEPTH"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "FIFO Depth"
            description        = "Set Byte to Pixel FIFO depth. Refer to IP User Guide for details."
            default            = "2048"
            value_expr         = "ext_fifo_delay_depth_calc(BIT_WIDTH,BIT_PER_PIXEL,LINE_LENGTH,EFF_DATA_RATE,OUT_DATA_RATE,'BD')"
            value_range        = "(2, 65536)"
            editable           = "MAN_ADJ"
            hidden             = "not NATIVE_INTF and not AXI4_INTF"
            group1             = "FIFO"
        />
        <lsccip:setting
            id                 = "FIFO_DELAY"
            type               = "param"
            conn_mod           = "lscc_slvsec_rx"
            value_type         = "int"
            title              = "FIFO Read Delay"
            description        = "Set Byte to Pixel delay cycles for FIFO read threshold. Refer to IP User Guide for details."
            default            = "4"
            value_expr         = "ext_fifo_delay_depth_calc(BIT_WIDTH,BIT_PER_PIXEL,LINE_LENGTH,EFF_DATA_RATE,OUT_DATA_RATE,'FD')"
            value_range        = "(1, 65536)"
            drc                = "ext_fifo_dly_drc(BUFFER_DEPTH,FIFO_DELAY,BIT_PER_PIXEL)"
            editable           = "MAN_ADJ"
            hidden             = "not NATIVE_INTF and not AXI4_INTF"
            group1             = "FIFO"
        />
        <lsccip:setting 
           id                  = "HDR_INFO"
           type                = "param"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "bool"
           title               = "Enable Header Analysis"
           description         = "Packet header information is parsed if 
                                  enabled and made available at the output."
           bool_value_mapping  = "('ENABLED', 'DISABLED')"
           default             = "True"
           hidden              = "not NATIVE_INTF"
           group1              = "Header Analysis"
        />
        <!--temporarily disabled frame sync feature. not yet supported-->
        <lsccip:setting 
           id                  = "FRAME_SYNC"
           type                = "input"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "bool"
           title               = "Enable Frame Synchronization Signals"
           bool_value_mapping  = "('ENABLED', 'DISABLED')"
           default             = "False"
           editable            = "False"
           hidden              = "True"
           group1              = "Frame Synchronization"
        />

        <lsccip:setting 
           id                  = "MISC_ON"
           type                = "input"
           conn_mod            = "lscc_slvsec_rx"
           value_type          = "bool"
           title               = "Enable Miscellaneous Signals"
           description         = "Miscellaneous signals are available at the output if enabled."
           bool_value_mapping  = "('ENABLED', 'DISABLED')"
           default             = "False"
           group1              = "Miscellaneous"
        />
    </lsccip:settings>
    
    <lsccip:ports>
        <lsccip:port
            name                 = "reset_n_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "reset_n_i"
            port_type            = "reset"
        />
        <lsccip:port
            name                 = "refclk_n_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "refclk_n_i"
            port_type            = "clock"
        />
        <lsccip:port
            name                 = "refclk_p_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "refclk_p_i"
            port_type            = "clock"
        />
        <lsccip:port
            name                 = "mpcs_clkin_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "mpcs_clkin_i"
            port_type            = "clock"
        />
        <lsccip:port
            name                 = "mpcs_pwrdn_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "mpcs_pwrdn_i"
            range                = "(1, 0)"
        />
        <lsccip:port
            name                 = "d_n_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "d_n_i"
            range                = "(LANE_WIDTH-1, 0)"
        />
        <lsccip:port
            name                 = "d_p_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "d_p_i"
            range                = "(LANE_WIDTH-1, 0)"
        />
        <lsccip:port
            name                 = "pixel_clk_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "pixel_clk_i"
            dangling             = "not NATIVE_INTF and not UVSI_INTF"
        />
        <lsccip:port
            name                 = "fv_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "fv_o"
            dangling             = "not NATIVE_INTF"
        />
        <lsccip:port
            name                 = "pixel_data_en_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "pixel_data_en_o"
            dangling             = "not NATIVE_INTF"
        />
        <lsccip:port
            name                 = "pixel_data_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "pixel_data_o"
            range                = "(int(PIX_WIDTH-1), 0)"
            dangling             = "not NATIVE_INTF"
        />
        <lsccip:port
            name                 = "pixel_vld_num_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            range                = "(7, 0)"
            conn_port            = "pixel_vld_num_o"
            dangling             = "not NATIVE_INTF"
        />
        <lsccip:port
            name                 = "hdr_vld_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "hdr_vld_o"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "lv_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "lv_o"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "fs_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "fs_o"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "fe_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "fe_o"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "line_num_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "line_num_o"
            range                = "(12, 0)"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "data_id_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "data_id_o"
            range                = "(3, 0)"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "hdr_type_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "hdr_type_o"
            range                = "(2, 0)"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "line_length_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "line_length_o"
            range                = "(15, 0)"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "hdr_crc_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "hdr_crc_o"
            range                = "(15, 0)"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "ebd_en_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "ebd_en_o"
            dangling             = "(not NATIVE_INTF or not HDR_INFO)"
        />
        <lsccip:port
            name                 = "pyld_crc_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "pyld_crc_o"
            range                = "(31, 0)"
            dangling             = "not MISC_ON"
        />
        <lsccip:port
            name                 = "pyld_crc_en_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "pyld_crc_en_o"
            dangling             = "not MISC_ON"
        />
        <lsccip:port
            name                 = "xvs_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "xvs_o"
            dangling             = "not FRAME_SYNC"
        />
        <lsccip:port
            name                 = "xhs_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "xhs_o"
            dangling             = "not FRAME_SYNC"
        />
        <lsccip:port
            name                 = "refclk_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "refclk_o"            
            port_type            = "clock"
            dangling             = "not FRAME_SYNC"
        />
        <lsccip:port
            name                 = "setup_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "setup_i"
        />
        <lsccip:port
            name                 = "stdby_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "stdby_i"
            stick_low            = "True"
        />
        <lsccip:port
            name                 = "mpcs_ready_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "mpcs_ready_o"
        />
        <lsccip:port
            name                 = "tx_rdy_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "tx_rdy_i"
            stick_high           = "True"
        />
        <lsccip:port
            name                 = "ready_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "ready_o"
        />
        <lsccip:port
            name                 = "stdby_det_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "stdby_det_o"
            dangling             = "True"
        />
        <lsccip:port
            name                 = "pyld_err_flag_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "pyld_err_flag_o"
            dangling             = "AXI4_INTF and not NATIVE_INTF"
        />
        <lsccip:port
            name                 = "mpcs_rx_clk_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "mpcs_rx_clk_o"
            dangling             = "not MISC_ON"
        />
        <lsccip:port
            name                 = "m_aclk_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "m_aclk_i"
            port_type            = "clock"
            stick_low            = "not AXI4_INTF"
            bus_interface        = "AXI4S_M0"
        />
        <lsccip:port
            name                 = "m_tready_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "m_tready_i"
            stick_low            = "not AXI4_INTF"
            bus_interface        = "AXI4S_M0"
        />
        <lsccip:port
            name                 = "m_tvalid_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "m_tvalid_o"
            dangling             = "not AXI4_INTF"
            bus_interface        = "AXI4S_M0"
        />
        <lsccip:port
            name                 = "m_tdata_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "m_tdata_o"
            range                = "(int(PIX_WIDTH + 8 - 1), 0)"
            dangling             = "not AXI4_INTF"
            bus_interface        = "AXI4S_M0"
        />
        <lsccip:port
            name                 = "m_tuser_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "m_tuser_o"
            range                = "(58, 0)"
            dangling             = "not AXI4_INTF"
            bus_interface        = "AXI4S_M0"
        />
        <lsccip:port
            name                 = "apb_pclk_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "apb_pclk_i"
            port_type            = "clock"
        />
        <lsccip:port
            name                 = "apb_preset_n_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "apb_preset_n_i"
            port_type            = "reset"
        />
        <lsccip:port
            name                 = "apb_psel_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "apb_psel_i"
            bus_interface        = "APB_S0"
        />
        <lsccip:port
            name                 = "apb_paddr_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "apb_paddr_i"
            range                = "(31, 0)"
            bus_interface        = "APB_S0"
        />
        <lsccip:port
            name                 = "apb_pwdata_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "apb_pwdata_i"
            range                = "(31, 0)"
            bus_interface        = "APB_S0"
        />
        <lsccip:port
            name                 = "apb_pwrite_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "apb_pwrite_i"
            bus_interface        = "APB_S0"
        />
        <lsccip:port
            name                 = "apb_penable_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "apb_penable_i"
            bus_interface        = "APB_S0"
        />
        <lsccip:port
            name                 = "apb_pready_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "apb_pready_o"
            bus_interface        = "APB_S0"
        />
        <lsccip:port
            name                 = "apb_prdata_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "apb_prdata_o"
            range                = "(31, 0)"
            bus_interface        = "APB_S0"
        />
        <lsccip:port
            name                 = "int_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "int_o"
            dangling             = "True"
            bus_interface        = "INTR"
        />
        <lsccip:port
		    name                 = "axis_vid_tready_i"
            dir                  = "in"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "axis_vid_tready_i"
            stick_high           = "not UVSI_INTF"
            bus_interface        = "AXI4S_VID"
        />
        <lsccip:port
		    name                 = "axis_vid_tvalid_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "axis_vid_tvalid_o"
            dangling             = "not UVSI_INTF"
            bus_interface        = "AXI4S_VID"
        />
        <lsccip:port
		    name                 = "axis_vid_tdata_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "axis_vid_tdata_o"
            range                = "((UVSI_WIDTH - 1), 0)"
            dangling             = "not UVSI_INTF"
            bus_interface        = "AXI4S_VID"
        />
        <lsccip:port
		    name                 = "axis_vid_tuser_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "axis_vid_tuser_o"
            range                = "(1, 0)"
            dangling             = "not UVSI_INTF"
            bus_interface        = "AXI4S_VID"
        />
        <lsccip:port
		    name                 = "axis_vid_tlast_o"
            dir                  = "out"
            conn_mod             = "lscc_slvsec_rx"
            conn_port            = "axis_vid_tlast_o"
            dangling             = "not UVSI_INTF"
            bus_interface        = "AXI4S_VID"
        />
    </lsccip:ports>

    <lsccip:outFileConfigs>
        <lsccip:fileConfig name="wrapper" skip_uniquify="false" file_suffix="sv" file_description="top_level_system_verilog"/>
    </lsccip:outFileConfigs>

    <xi:include href="bus_interface.xml" parse="xml"/>
    <xi:include href="memory_map.xml" parse="xml"/>
</lsccip:ip>