# 2D Scaler IP Core

## Description

The 2D Scaler IP Core converts input video frames of one size to output video frames of a different size. Its flexible
architecture supports a wide variety of scaling algorithms. The highly configurable design takes advantage of the
embedded DSP blocks available in Lattice FPGAs. A simple I/O handshake makes the core suitable for either streaming
video or burst input video data. In-system input and output frame sizes updating is possible on a frame basis.

## Devices Supported

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX

## References

- User Guide
- IP Release Notes