# DEINTERLACER

## Description

The Lattice Semiconductor Deinterlacer IP core converts interlaced video into progressive video format using bob, intra
motion and inter motion adaptive deinterlacing algorithms to reduce interline flickers and jagged edges. The
Deinterlacer IP core supports image sizes up to 4k × 4k with YCbCr 4:2:2, 4:4:4 and RGB video formats. The Deinterlacer
IP core supports dynamic parameter updating through a parameter bus, which can be configured to operate on a
different clock from the core. Simple frame rate conversion is employed to support different input and output frame
rates.

## Devices Supported

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant, Certus-N2

## References

- User Guide
- IP Release Notes