# CSI-2/DSI D-PHY Transmitter

## Description

The Lattice Semiconductor CSI-2/DSI D-PHY Transmitter IP Core converts data bytes from a requestor to either DSI or CSI-2 data format for the Lattice Avant™, Nexus™, and Nexus 2 platforms.The CSI-2/DSI D-PHY Transmitter Submodule IP is intended for applications that require a D-PHY transmitter in the FPGA logic. This IP supports both high-speed (HS) and low power (LP) modes. The payload data uses the high-speed mode whereas the control and status information are sent in low power mode. The number of D-PHY data lanes for data transmission is configurable. This IP supports 1, 2, 3, or 4 data lanes.

## Devices Supported

Crosslink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant, Certus-N2

## References

- User Guide
- IP Release Notes