# OpenLDI/FPD-LINK/LVDS Receiver

## Description

The Lattice Semiconductor OpenLDI/FPD-LINK/LVDS Receiver Interface IP converts a standard OpenLDI serial video
interface into pixel clock domain. The input interface for the design consists of a data bus, vertical and horizontal sync
flags, a data enable, and a clock in OpenLDI (LVDS 7:1) interface format. Output interface consists of the RGB control
signals, pixel clock, up to four pixel data per pixel clock, and debug signals.

## Devices Supported:

Crosslink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant, Certus-N2

## References

- User Guide
- IP Release Notes