# SGDMAC

## Description

SGDMAC - Scatter Gather Direct Memory Access Controller IP core is to access main memory independent of the processor.It offloads processor intervention.
The processor initiates transfer to SGDMAC and receives interrupt oncompletion of the transfer by DMA Engine.
The Lattice SGDMAC core implements a configurable, AXI4 - compliant DMA controller with scatter-gather capability.

## Devices Supported

LFCPNX-100

## References

- User Guide

## Revision History

2.0.0 | Rearchitect SGDMA, enabling AXI protocol. Not backward compatible to previous versions
1.2.0 | Added LFMXO5 support.
1.1.0 | Added LFCPNX support.
1.0.0 | Initial release.