# SPI Target

## Description

The SPI Target IP provides a bridge between LMMI/AHB-Lite/APB interface and standard external SPI bus interface.

## Devices Supported

LIFCL-40, LIFCL-33, LIFCL-17, LFD2NX-40, LFD2NX-17, LFD2NX-9, LFD2NX-28, LFCPNX-50, LFCPNX-100, LFMXO5-25, LFMXO5-55T, LFMXO5-100T, UT24C40, UT24CP100, LAV-AT-E70, LAV-AT-G70, LAV-AT-X70, LN2-CT-20

## References

- User Guide

## Release Notes

2.3.0 | IP Release Notes
2.1.0 | Increased FIFO depth. Added Avant G/X support.
2.0.0 | Changed terminology to Target.
1.5.1 | Added driver version number and more comments.
1.5.0 | Added Avant support.
1.4.0 | Added IP driver and Propel 2.2 support.
1.3.0 | Modified metadata.xml to change minimum value of Tx/Rx_FIFO_Almost_Full/Empty_Flag to 1. Added static value attributes for setting the miso_o to a static value when write FIFO is empty.
1.2.0 | Added LFMXO5 support.
1.1.0 | Added LFCPNX support.
1.0.1 | Added LFD2NX support. Fixed RTL Bug related to Daisy Chain. Reduced AHB-Lite and APB Read Latency from 2 to 1 clock cycle.
1.0.0 | Preliminary release.