# UART_16550

## Description

Universal Asynchronous Receiver/Transmitter (UART) 16550 Transceiver IP performs serial-to-parallel conversion on data characters received from a peripheral UART device or a MODEM, and parallel-to-serial conversion on data characters received from the Host located inside the FPGA through a Lattice Memory-Mapped Interface (LMMI) or APB.

## Devices Supported

iCE40UP3K, iCE40UP5K, LIFCL-40, LIFCL-17, LFD2NX-40

## References

- User Guide

## Revision History

1.1.1 | Added LFD2NX support. Reduced APB read latency from 2 to 1 clock cycle.
1.1.0 | Added optional APB I/F, MODEM control signals are now optional and updated interrupts
1.0.0 | Initial release.