# Watchdog Timer

## Description

Watchdog Timer IP Core is a two-stage timer that supports warm boot (nmi_o) and cold boot (reset_o) reset.

## Devices Supported

All

## References

- User Guide

## Revision History

1.6.0 | Updated registers: - removed Reset Register - corrected timer bit width - removed option to to disable warm boot reset (nmi_o) interrupt, non-maskable Fixed issues in APB access.
1.5.1 | Updated the int_o port to become a bus when in APB Mode.
1.5.0 | Updated memory_map.xml to fix Propel SGE generation.
1.4.0 | Updated testbench's GSR instance. Added APB interface.
1.3.0 | Updated to support all devices.
1.2.0 | Added LFCPNX support.
1.1.0 | Added LFD2NX support.
1.0.0 | Initial release.